AK5554 Datasheet, PDF (60/68 Pages) Asahi Kasei Microsystems – 4-Channel Differential 32-bit ADC

[AK5554]
■ Register Map
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00H Power Management1
1
1
1
1
PW4
PW3
PW2
PW1
01H Power Management2
0
0
0
0
0
MONO2 MONO1
RSTN
02H Control 1
0
CKS3 CKS2
CKS1
CKS0
DIF1
DIF0
HPFE
03H Control 2
0
TDM1 TDM0
0
0
0
0
0
04H Control 3
DP
0
0
0
0
0
SD
SLOW
05H DSD
0
0
DCKS
0
PMOD DCKB DSDSEL1 DSDSEL0
06H TEST1
TST7 TST6 TST5
TST4
TST3 TST2
TST1
TST0
07H TEST2
0
0
0
0
0
0
0
TRST
Note 24. Data must not be written into addresses from “06H” to “1FH”.
Note 25. The bits indicated as “0” must contain a “0” value. When RSTN bit is set to “0”, the internal digital
filter and the control block are reset but the register values are not initialized.
Note 26. When the PDN pin is set to “L”, all registers are initialized to their default values.
■ Register Definitions
Addr Register Name
D7
D6
D5
D4 D3 D2 D1 D0
00H Power Management1
1
1
1
1 PW4 PW3 PW2 PW1
R/W
R/W R/W R/W R/W R/W R/W R/W R/W
Default
1
1
1
1
1
1
1
1
PW4-1: Power Down control for channel 4-1
0: power OFF
1: power ON (default)
Addr Register Name
D7 D6 D5 D4 D3
01H Power Management2
0
0
0
0
0
R/W
R/W R/W R/W R/W R/W
Default
0
0
0
0
0
RSTN: Internal Timing Reset
0: Reset. All registers are not initialized.
1: Normal Operation (default)
Internal clock timings are reset but registers are not reset.
D2
MONO2
R/W
0
D1
MONO1
R/W
0
D0
RSTN
R/W
1
MONO2-1: Channel Summation Mode Select (Table 17-Table 19)
00: Not- Summation mode (default)
01: 4-to-2 mode
10: Not- Summation mode
11: 4-to-1 mode
Addr Register Name
D7
D6
D5
D4
02H Control 1
0 CKS3 CKS2 CKS1
R/W
R/W R/W R/W R/W
Default
0
0
0
0
HPFE: High Pass Filter Enable
0: High Pass Filter OFF
1: High Pass Filter ON (default)
When this bit is “1”, digital HPFs for all channels are ON.
D3
CKS0
R/W
0
D2
DIF1
R/W
0
D1
DIF0
R/W
0
D0
HPFE
R/W
1
DIF1-0: Audio Data Interface Modes Select (Table 8, Table 9)
Select A/D data bit length (24-bit/32-bit) and the format (MSB justified/ I2S Compatible)
CKS3-0: Sampling Speed Mode and MCLK Frequency Select (Table 5)
Select Sampling Speed and MCLK frequency.
015099864-E-00
- 60 -
2016/03