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AK5554 Datasheet, PDF (5/68 Pages) Asahi Kasei Microsystems – 4-Channel Differential 32-bit ADC
[AK5554]
■ Pin Functions
No. Pin Name
1 NC
2 VREFL1
3 VREFH1
4 AIN2N
5 AIN2P
6 AVDD
7 AVSS
8 AIN3P
9 AIN3N
10 VREFH2
11 VREFL2
12 NC
13 AIN4N
14 AIN4P
15 TEST
16 MCLK
17 TVDD
18 DVSS
19 VDD18
I/O Function
- No internal bonding. Connect to AVSS.
I ADC Low Level Voltage Reference Input Pin
I ADC High Level Voltage Reference Input Pin
I Channel 2 Negative Input Pin
I Channel 2 Positive Input Pin
- Analog Power Supply Pin (AIN1-4), 4.5-5.5 V
- Analog Ground Pin (AIN1-4)
I Channel 3 Positive Input Pin
I Channel 3 Negative Input Pin
I ADC High Level Voltage Reference Input Pin
I ADC Low Level Voltage Reference Input Pin
- No internal bonding. Connect to AVSS.
I Channel 4 Negative Input Pin
I Channel 4 Positive Input Pin
I TEST Enable Pin
I Master Clock Input Pin
-
Digital I/O Buffers and LDO Power Supply Pin,
1.7-1.98 V (LDOE pin= “L”) or 3.0-3.6 V (LDOE pin= “H”).
- Digital Ground Pin
I Digital Core Power Supply Pin, 1.7-1.98V (LDOE pin= “L”)
O LDO Stabilization Capacitor Connect Pin. (LDOE pin= “H”)
20 PDN
21 PW0
22 PW1
23 PW2
24 MSN
BICK
25
DCLK
LRCK
26
DSDOL1
TDMIN
27
DSDOR1
28 SDTO1
DSDOL2
SDTO2
29 DSDOR2
30 OVF
I
Reset & Power Down Pin
“L”: Reset & Power Down, “H” : Normal Operation
I Power Management Pin, Channel Summation Select Pin1
I Power Management Pin, Channel Summation Select Pin2
I Power Management Pin, Channel Summation Select Pin3,
I Master/Slave Select Pin
I
Audio Serial Data Clock Input Pin in PCM & Slave Mode
(This pin is pull down by 100 kΩ internally.)
O
Audio Serial Data Clock Output Pin in PCM & Master Mode
(This pin is pull down by 100 kΩ internally.)
O
DSD Clock Output Pin in DSD Mode
(This pin is pull down by 100 kΩ internally.)
I
Channel Clock Input Pin in PCM & Slave Mode
(This pin is pull down by 100 kΩ internally.)
O
Channel Clock Output Pin in PCM & Master Mode
(This pin is pull down by 100 kΩ internally.)
O
Audio Serial Data Output Pin for AIN1 in DSD Mode
(This pin is pull down by 100 kΩ internally.)
I
TDM Data Input Pin in PCM Mode
(This pin is pull down by 100 kΩ internally.)
O
Audio Serial Data Output Pin for AIN2 in DSD Mode
(This pin is pull down by 100 kΩ internally.)
O Audio Serial Data Output Pin for AIN1 and AIN2 in PCM Mode
O Audio Serial Data Output Pin for AIN3 in DSD Mode
O Audio Serial Data Output Pin for AIN3 and AIN4 in PCM Mode
O Audio Serial Data Output Pin for AIN4 in DSD Mode
O Analog Input Over Flow Flag Output Pin
Power Down
Status
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Hi-z & Pull
Down with
500 Ω
-
-
-
-
-
-
Hi-z
Hi-z
-
Hi-z
Hi-z
-
Hi-z
L
L
L
L
L
015099864-E-00
-5-
2016/03