AK5554 Datasheet, PDF (47/68 Pages) Asahi Kasei Microsystems – 4-Channel Differential 32-bit ADC

[AK5554]
PW2 PW1 PW0
Power ON/OFF
pin pin pin Ch4 Ch3 Ch2 Ch1
L
L
L OFF OFF OFF OFF
L
L
H ON ON OFF OFF
L H L OFF OFF ON ON
L H H ON ON ON ON
H
L
L OFF ON ON ON
H
L
H ON ON OFF OFF
H H L OFF OFF ON ON
H H H ON ON ON ON
Table 11. Channel Power ON/OFF (Parallel Control Mode, ODP pin= ”L”)
PW2
pin
L
L
L
L
H
H
H
H
PW1
pin
L
L
H
H
L
L
H
H
PW0
Data on Slot
pin
Slot 4
Slot 3
Slot 2
Slot 1
L
All “0”
All “0”
All “0”
All “0”
H
(CH3+4)/2
(CH3+4)/2
All “0”
All “0”
L
All “0”
All “0”
(CH1+2)/2
(CH1+2)/2
H
(CH3+4)/2
(CH3+4)/2
(CH1+2)/2
(CH1+2)/2
L
All “0”
CH3
CH2
CH1
H
CH4
CH3
All “0”
All “0”
L
All “0”
All “0”
CH2
CH1
H
CH4
CH3
CH2
CH1
Table 12. Slot Data Assign (Parallel Control Mode, ODP pin= “L”)
When the ODP pin = “H”, the AK5554 becomes optimal data placement mode and data slots can be used
efficiently. The PW2-0 pins control power down, 4-to-2 mode and 4-to-1 mode.
In 4-to-2 mode, AIN1 and AIN2 channel data are summed digitally and output from the SDTO1
(DSDOL1) by dividing into half amplitude. In the same manner, AIN3 and AIN4 channel data are
summed digitally and output from the SDTO1 (DSDOR2) by dividing into half amplitude.
In 4-to-1 mode, AIN1 - AIN4 channel data are summed digitally and output from the SDTO1 (DSDOL1) of
the slot1 by dividing into quarter amplitude.
PW2 PW1 PW0
Power ON/OFF
pin pin pin Ch4 Ch3 Ch2 Ch1
L
L
L OFF OFF OFF OFF
L
L
H ON ON ON ON
L H L ON ON ON ON
L H H ON ON ON ON
H
L
L ON ON ON ON
H
L
H ON ON ON ON
H H L ON ON ON ON
H H H ON ON ON ON
Table 13. Channel Power ON/OFF (Parallel Control mode, ODP pin= ”H”)
015099864-E-00
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2016/03