AKD4527B Datasheet, PDF (6/40 Pages) Asahi Kasei Microsystems – EVALUATION BOARD REV.D FOR AK4527B

ASAHI KASEI
[AKD4527B Rev.D]
n Evaluation mode
1) Evaluation of ADC
TOTX176 is used for digital output. Clock mode of the AK4112A should be set to PLL mode or X’tal mode.
2) Evaluation of DAC
TORX176 or BNC is used for digital input. Clock mode of the AK4112A should be set to PLL mode. “4112” should
be selected on JP4,5 and 6.
3) Loopback mode
Clock mode of the AK4112A should be set to PLL mode or X’tal mode. “4112” should be selected on JP4,5 and 6.
4) Evaluation of DAC using DSP
“DSP” should be selected on JP4,5 and 6.
Evaluation mode
ADC
DAC
Loopback
Using DSP
n Jumper pin set up
AK4112A clock set-up
CM1=”0”, CM0=”0”(PLL mode) or
CM1=”0”, CM0=”1”(X’tal mode)
CM1=”0”, CM0=”0”(PLL mode)
CM1=”0”, CM0=”1”(X’tal mode)
CM1=”0”, CM0=”0”(PLL mode)
Table 2.Evalution mode
JP4,5,6
Don’t
care
“4112”
“4112”
“DSP”
Used I/F
TOTX176
optical output
PORT5(10-pin Header)
[JP1] (GND) ---Analog GND and Digital GND
[JP4,5,6] (SDTI1,2,3) --- AK4527B SDTI1,2,3 input source select
<DSP> : Serial Data is input from DSP via PORT5.
<4112> : Serial Data is input from AK4112A SDTO. <default>
[JP2] (V/TX)
--- AK4112A V/TX output select.
<V> : Validity. <default>
<TX> : Transmit channel (through data)
n The function of the toggle SW.
[SW1] : Resets the AK4527B, AK4112A and AK4353. Keep “H” during normal operation.
n The indication content for LED.
[LE1] (ERF) : AK4112A unlock and parity error output.
[LE2] (FS96) : AK4112A 96kHz sampling detect.
[LE3] (AUTO) : AK4112A AC-3/MPEG detect.
[LE4] (V) : Validity
<KM063700>
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