AKD4527B Datasheet, PDF (2/40 Pages) Asahi Kasei Microsystems – EVALUATION BOARD REV.D FOR AK4527B

ASAHI KASEI
[AKD4527B Rev.D]
n Consideration for analog input circuit
1.5Vpp
AK4527
LPF
1nF 470
RIN+ 32
470
RIN- 31
1.5Vpp
LIN+ 30
Op-amp circuit
2.4k
4.7k
4.7k
-
+
-
+
NJM5532
LIN- 29
Same circuit
10k
AVDD
HPF
22u
6.25Vpp
Signal
4.7k
0.1u _BIAS
4.7k
+
47u
1) Frequency response of HPF
The HPF is implemented on board to cancel the DC offset of analog output of AK4527B.
Frequency response of 1st-order HPF
|Amplitued|² = 1/{1+(fc/f)²}; fc=1/2πRC=0.7Hz@R=10k,C=22u
fin
20Hz
Frequency Response -0.006dB
2) Gain and S/N of op-amp circuit
Two stages of inverting op-amp circuit are implemented on board to convert single-ended input to full-differential
input for ADC of AK4527B.
a) Gain
The gain of each op-amp circuit is as following table:
Gain[dB]
First step
-12.40
Second step
0.00
Therefore input level for this board is
-5.51dBV(=1.5Vpp)+12.40dB
= +6.89dBV = 6.25Vpp = 2.21Vrms.
b) S/N (Theory: BW=20k+A)
The output noise level of each op-amp circuit is as following table:
Noise[dBV]
First step
-120.56
Second step
-115.91
The noise level summing differential output of op-amp circuit is
-113.64dBV = -114.13dB (0dB = +0.49dBV = 3Vpp).
S/N of ADC is
104.5dB (measurement).
Therefore total S/N of op-amp circuit and ADC is
104.05dB (measurement: 103.9dB).
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