AKD7600-A Datasheet, PDF (5/45 Pages) Asahi Kasei Microsystems – AK7600VF Evaluation Board Rev.1

[AKD7600-A]
(2) Master Mode of AK7600VF
ɿMCLK is from X’tal2(Sub-board:X’tal1A), AK4114, or BNC.(The master mode is only for 256fs speed of
MCLK(11.2896MHz))
(2-1) MCLK (JP8: MASTER 2-3, JP9: EXT 2-3)
(2-1-1) MCLK from X’tal2 (JP9: Master 1-2)
JP8
JP9
7600
XTI
Slave Master XTL EXT
(2-1-2) MCLK from AK4114(JP5É¿DIR 2-3, JP6É¿Open)
JP8
JP9
7600
XTI
JP5
MCLK
JP6
BNC GND
Slave Master XTL EXT EXT DIR OPEN
(2-1-3) MCLK From BNC(JP5É¿EXT 1-2, JP6É¿Short)
JP8
JP9
7600
XTI
JP5
MCLK
JP6
BNC GND
Slave Master XTL EXT EXT DIR
(2-2) BICK(JP3É¿DIR 1-2, JP4É¿THR 1-2)
JP4
BICK
JP3
PHASE
SHORT
(2-3) LRCK(JP7É¿DIR 2-3Ê£
DIR 64fs THR INV
JP7
LRCK
(3) AK4114 Clock (JP1)
(3-1) From X’tal1 (JP1ɿXTL 1-2)
1fs DIR
JP1
XTI
XTL EXT
(3-2) From CLKO pin(TX-CLK) of AK7600VF(JP1É¿EXT 2-3)
JP1
XTI
XTL EXT
< KM091700>
-5-
2008/04