AKD7600-A Datasheet, PDF (12/45 Pages) Asahi Kasei Microsystems – AK7600VF Evaluation Board Rev.1

[AKD7600-A]
D7 D6 D5 D4
0000
0010
0100
0110
1000
1010
1100
1110
0001
0011
0101
0111
1001
1011
1101
1111
DAC3
Zero
Zero
Zero
Zero
-
-
-
-
Zero
Zero
Zero
Zero
-
-
-
-
DAC2
Zero
Zero
-
-
Zero
Zero
-
-
Zero
Zero
-
-
Zero
Zero
-
-
DAC1
Zero
-
Zero
-
Zero
-
Zero
-
Zero
-
Zero
-
Zero
-
Zero
-
DZF pin output Level
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
Table 11 DZF pin Setup
„ Register Name: CONT02
D7
D6
D5
D4
D3
COMMAND (03H)
0
0
0
0
0
Setting bit (1byte)
LRCK BICK MCKO Reserved
DO3
R/W
R/W R/W R/W
R/W
R/W
Default
0
0
0
0
0
• LRCK: LR Clock output enable
0: LRCK pin outputs “L”
1: Output LRCK to the LRCK pin
• BICK: Bit Clock output enable
0: BICK pin outputs “L”
1: Output BIT clock (64fs) to the BICK pin
• MCKO: Master Clock output enable
0: CLKO pin outputs “L”
1: Output master clock (256fs) to the CLKO pin
• Reserved: Write “0” into this bit.
• DO3: SDTO3 Signal output enable
0: SDTO3 pin outputs “L”
1: Output audio data to the SDTO3 pin
• DO2: SDTO2 Signal output enable
0: SDTO2 pin outputs “L”
1: Output audio data to the SDTO2 pin
• DO1: SDTO1 Signal output enable
0: SDTO1 pin outputs “L”
1: Output audio data to the SDTO1 pin
D2 D1 D0
0
11
DO2 DO1 0
R/W R/W RD
0
00
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2008/04