AKD4687-A Datasheet, PDF (5/52 Pages) Asahi Kasei Microsystems – Evaluation board Rev.2 for AK4687

(1) Evaluation of A/D and D/A by using DIR/DIT: Asynchronous mode <Default>
a) Set up of A/D
J10 TX (RCA-Jack) or PORT3 (Optical connector) is used.
Nothing should be connected to PORT4.
JP5
MCLK1_SEL
JP6
JP7
BICK1_SEL LRCK1_SEL
JP8
SDTO
MCLK2 MCLK1 BICK2 BICK1 LRCK2 LRCK1
b) Set up of D/A
J11 RX (RCA-Jack) or PORT5 (Optical connector) is used.
Nothing should be connected to PORT6.
JP12
MCLK2
JP13
BICK2
JP14
LRCK2
JP15
SDTI
[AKD4687-A]
(2) All interface signals are fed externally.
In case of evaluating A/D and D/A of the AK4687 on synchronous mode, synchronize clock signals and data signals
between A/D and D/A.
a) Set up A/D
PORT4 is used.
Nothing should be connected to J10 TX (RCA-Jack) or PORT3 (Optical connector).
JP5
MCLK1_SEL
JP6
JP7
BICK1_SEL LRCK1_SEL
JP8
SDTO
MCLK2 MCLK1 BICK2 BICK1 LRCK2 LRCK1
b) Set up of D/A
PORT6 is used.
Nothing should be connected to J11 RX (RCA-Jack) or PORT5 (Optical connector).
JP12
MCLK2
JP13
BICK2
JP14
LRCK2
JP15
SDTI
<KM104603>
-5-
2011/06