AKD4648-C Datasheet, PDF (5/71 Pages) Asahi Kasei Microsystems – stereo CODEC with MIC/HP/SPK amplifier

[AKD4648-C]
(2) External Master Mode
(2-1) Evaluation of A/D using DIT of AK4115
PORT2 (DIT) and X1 (X’tal) are used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP).
In Master Mode, BICK and LRCK of AK4648 should be input to AK4115. Please refer to Table2 on page 11.
The jumper pins should be set as follows.
JP14
4115_MCKI
JP15
DIR_MCLK
JP16
BICK
JP17
LRCK
JP19
DIR_SEL
Slave Master
(2-2) Evaluation of D/A using DIR of AK4115
PORT1 (DIR) is used. Nothing should be connected to PORT2 (DIT) and PORT3 (DSP).
In Master Mode, BICK and LRCK of AK4648 should be input to AK4115. Please refer to Table2 on page 11.
The jumper pins should be set as follows.
JP14
4115_MCKI
JP15
DIR_MCLK
JP16
BICK
JP17
LRCK
JP19
DIR_SEL
JP21
SDTI
Slave Master
DIR ADC
(2-3) Evaluation of Loop-back using AK4115
X1 (X’tal) is used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP).
The jumper pins should be set as follows.
JP14
4115_MCKI
JP15
DIR_MCLK
JP16
BICK
JP17
LRCK
JP19
DIR_SEL
JP21
SDTI
Slave Master
DIR ADC
(2-4) All interface signals are fed externally
PORT3 (DSP) is used. Nothing should be connected to PORT1 (DIR) and PORT2 (DIT).
The jumper pins should be set as follows.
JP20
SDTO-IN
JP15
DIR_MCLK
JP16
BICK
JP17
LRCK
JP19
DIR_SEL
Slave Master
JP21
SDTI
DIR ADC
<KM088701>
-5-
2007/04