AKD4588 Datasheet, PDF (5/46 Pages) Asahi Kasei Microsystems – Evaluation board Rev.C for AK4588

ASAHI KASEI
[AKD4588]
„ Setting of DIP-SW2
[SW2]: Setting of AK4588
No.
Pin
OFF
ON
Default
1
-
-
-
OFF
2 MASTER
Slave Mode
Master Mode
ON
3
XTL1
Reference X’tal frequency (Refer Table 4,5)
ON
4
XTL0
ON
5
CAD1 ^{Setting of Chip Address (ADC/DAC PART)}
OFF
6
CAD0 ^{Setting of Chip Address (ADC/DAC PART)}
ON
Table 2 Setting of SW2 (No.3~6;ON: 1, OFF:0)
„ Sampling frequency as follows
AK4588 has two methods for detecting the sampling frequency. Clock is compared between recovered clock and X’tal
oscillator by XTL1-0. This information outputs FS0, FS1, and FS2, FS3 bit for detecting the sampling frequency.
The compared X’tal frequency is selected by setting of XTL1-0 (Refer Table 4.) When XTL1-0 is 11, X’tal oscillator is
stopped and the encored sampling frequency information of channel status output FS0, FS1, FS2, FS3, PEM bit of resister
control.
XTL1
0
0
1
1
XTL0
X’tal Frequency
0
11.2896MHz
1
12.288MHz
0
24.576MHz
1
(use channel status)
Table 3 Reference X’tal frequency
Default
Except XTL1,0= “1,1”
XTL1, 0= “1,1”
Register output
fs
FS3 FS2 FS1 FS0
Clock comparison
(Note 1)
Consumer
mode
(Note 2)
Byte3
Bit3, 2,1,0
Professional mode
Byte0 Bit7, Byte4 Bit6,
6
5,4,3
0
0
00
44.1kHz
44.1kHz
0000
01
0000
0
0
01
Reserved
Reserved
0001
(Others)
0
0
10
48kHz
48kHz
0010
10
0000
0
0
11
32kHz
32kHz
0011
11
0000
1
0
00
88.2kHz
88.2kHz
(1000)
00
1010
1
0
10
96kHz
96kHz
(1010)
00
0010
1
1
0 0 176.4kHz
176.4kHz
(1100)
00
1011
1
1
10
192kHz
192kHz
(1110)
00
0011
Note1: At least ±3% range is identified as the value in the Table 4. In case of intermediate frequency of those two,
FS3-0 bits indicate nearer value. When the frequency is much bigger than 192kHz or much smaller than
32kHz, FS3-0 bits may indicate “0001”.
Note2: When consumer mode, Byte3 Bit3-0 are copied to FS3-0 bits.
Table 4 fs Information
<KM073800>
-5-
2004/02