AKD4528_05 Datasheet, PDF (5/45 Pages) Asahi Kasei Microsystems – 24Bit A/D & D/A converter

ASAHI KASEI
[AKD4528]
„ Set-up SW1
[SW1]: Set-up AK4528. Upper is “ON”(“H”), Lower is “OFF”(“L”)
(For further details, refer to the datasheet.)
No. Name Default
OFF
ON
1
P/S
ON
Serial mode
Parallel mode (Default)
2 DEM1 OFF
3 DEM0 ON
Set up de-emphasis (Default: OFF)
(Refer to the datasheet.)
4 DFS
5 DIF
OFF Normal speed (Default)
ON
MSB justified
Double speed
I²S (Default)
6 CKS1
7 CKS0
OFF Set up Master clock frequency in case of the parallel mode
OFF
(Default: 256fs) (Refer to the datasheet.)
Table 5. Set up SW1
„ Set up Registers and Device pins of AK4528
The register setting uses the control software. (For further details, refer to the datasheet.)
1. Set up Parallel/Serial mode control
When P/S= “H”, the AK4528 becomes to the parallel mode. DIF pin selects the audio interface format, and DFS, CKS1,
and CKS0 pins select the master clock frequency.
When P/S= “L”, the AK4528 becomes to the serial mode. The CKS1, CKS0 and DIF pins are changed to CDTI, CCLK
and CSN pins respectively. The DEM1, DEM0 and DFS are ORed between pins and register respectively, so those are
able to control by pins even in serial mode. When all the functions are controlled by register, DEM1, DEM0 and DFS pins
should be set to “L”.
2. Set up Master clock frequency
(a) In case of serial mode
MCLK
MCLK
CMODE CKS1 CKS0 Normal Speed Double Speed
bit
bit bit (DFS bit = “0”) (DFS bit = “1”)
0
0
0
256fs
N/A
(Default)
0
0
1
512fs
256fs
0
1
0
1024fs
512fs
1
0
0
384fs
N/A
1
0
1
768fs
384fs
Table 6. Set up Master clock frequency in case of serial mode
(b) In case of parallel mode
CKS1
Pin
CKS0
Pin
MCLK
Normal Speed
MCLK
Double Speed
(SW1-6) (SW1-7) (DFS pin = “L”) (DFS pin = “H”)
L
L
256fs
N/A
(Default)
L
H
512fs
256fs
H
L
384fs
N/A
H
H
1024fs
512fs
Table 7. Set up Master clock frequency in case of parallel mode
<KM063101>
-5-
2005/11