AK4421 Datasheet, PDF (5/19 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output

[AK4421]
ANALOG CHARACTERISTICS
(Ta = 25°C; VDD=CVDD = +3.3V; fs = 44.1 kHz; BICK = 64fs; Signal Frequency = 1 kHz;
24bit Input Data; Measurement frequency = 20Hz ∼ 20kHz; R_L ≥5kΩ)
Parameter
min
typ
max
Resolution
24
Dynamic Characteristics (Note 4)
THD+N (-3dBFs) fs=44.1kHz, BW=20kHz
-92
-84
(Note 5)
fs=96kHz, BW=40kHz
-92
fs=192kHz, BW=40kHz
-92
-
Dynamic Range (-60dBFS with A-weighted, Note 6)
96
102
S/N (A-weighted, Note 7)
96
102
Interchannel Isolation (1kHz, -3dBFs)
90
100
Interchannel Gain Mismatch(-3dBFs)
0.2
0.5
DC Accuracy
DC Offset
(at output pin)
-60
0
+60
Gain Drift
100
-
Output Voltage (Note 8)
0dBFS
2.00
-3dBFS 1.27
1.42
1.57
Load Capacitance (Note 9)
25
Load Resistance
5
Power Supplies
Power Supply Current: (Note 10)
Normal Operation (fs≤96kHz)
Normal Operation (fs=192kHz)
Power-Down Mode (Note 11)
20
30
22
33
10
100
Note 4. Measured by Audio Precision (System Two). Refer to the evaluation board manual.
Note 5. -60dB(typ) at 0dBFs (R_L ≥10kΩ)
Note 6. 98dB for 16-bit input data
Note 7. S/N does not depend on input data size.
Note 8. Full-scale voltage (0dB). Output voltage is proportional to the voltage of VDD:
AOUT (typ.@0dB) = 2Vrms × VDD/3.3.
AOUT (typ.@-3dB) = 1.42Vrms × VDD/3.3.
Note 9. In case of driving capacitive load, inset a resistor between the output pin and the capacitive load.
Note 10. The current into VDD and CVDD.
Note 11. All digital inputs including clock pins (MCLK, BICK and LRCK) are fixed to VSS or VDD
Units
Bits
dB
dB
dB
dB
dB
dB
dB
mV
ppm/°C
Vrms
Vrms
pF
kΩ
mA
mA
μA
MS0945-E-01
-5-
2008/08