AK4421 Datasheet, PDF (16/19 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output

[AK4421]
1. Grounding and Power Supply Decoupling
VDD, CVDD and VSS are supplied from the analog supply and should be separated from the system digital supply.
Decoupling capacitors, especially 0.1μF ceramic capacitors for high frequency bypass, should be placed as near to VDD
and CVDD as possible. The differential voltage between VDD and VSS pins set the analog output range. The power-up
sequence between VDD and CVDD is not critical.
2. Analog Outputs
The analog outputs are single-ended and centered around the VSS (ground) voltage. The output signal range is typically
2.0Vrms (typ @VDD=3.3V). The internal switched-capacitor filter (SCF) and continuous-time filter (CTF) attenuate the
noise generated by the delta-sigma modulator beyond the audio passband. Using a 1^st-order LPF (Figure 11) can reduce
noise beyond the audio passband.
The output voltage is positive full scale for 7FFFFFH (@24-bit data) and negative full scale for 800000H (@24-bit
data). The ideal output is 0V (VSS) for 000000H (@24bit). The DC offset is ±60mV or less.
AK4421
AOUT
470
Analog
Out
2.00Vrms (typ)
2.2nF
(fc = 154kHz, gain = -0.28dB @ 40kHz, gain = -1.04dB @ 80kHz)
Figure 11. External 1^st order LPF Circuit Example
MS0945-E-01
- 16 -
2008/08