AK2363 Datasheet, PDF (5/33 Pages) Asahi Kasei Microsystems – Radio Signaling LSI

ASAHI KASEI
[AK2363]
Pin Functions
Pin
Pin No. Pin name
Pin
type
status
at
power-
down
1 RSTN
DI
Z Reset pin
Function
MSK signal transmit data input pin
2 TDATA
DI
Z _{Data is input from this pin on the rising edge of the clock signal on}
the TCLK pin.
3 TCLK
DO
L MSK signal transmit clock output pin
4 CSN
DI
Z Chip select input pin for serial data
5 SCLK
DI
6 VDD
PWR
7 SDATA
DB
8
RDFFD/
DO
RDATA
9 RCLK
DO
10 STD
DO
11 SD
DO
12 ACK
DI
13 LOADN
DI
Z Clock input pin for serial data
VDD power supply pin
-
Connect this pin to a power supply ranging from 2.6V to 3.7V with
less noise. Connect a bypass capacitor of 0.1mF or higher
between this pin and the VSS pin.
Z Serial data I/O pin
MSK signal receive flag/frame detection signal/RDATA signal
output pin
Two types of information is output depending on the FSL register
status.
If FSL is set to 1 to set the MSK signal receive flag output mode
L
(RDF), this pin is set to the low output level when 8 bits of the
MSK receive signal have been written to the receive data register.
If FSL is set to 0 to set the frame detection signal output mode
(FD), a low-level pulse is output on this pin when a frame pattern
is detected.
If setting register MSKRCLK is set to 1, the RDATA signal is
output.
L MSK signal receive clock output pin
Steering delay output pin for DTMF signal detection
L _{This pin goes high when internal data has been updated after}
completion of DTMF RX signal decoding.
DTMF signal receive data output pin
If the LOADN pin input is low, the result of DTMF RX signal
L decoding is output serially starting from the MSB in
synchronization with the falling edge of the ACK pin input.
If the LOADN pin input is high, the high level is output.
Z Clock input pin for DTMF signal receive data read
Z
Enable signal input pin for DTMF signal receive data read
If the low level is input, DTMF signal receive data can be read.
MS0583-E-01
-5-
2008/06