AK1573 Datasheet, PDF (5/42 Pages) Asahi Kasei Microsystems – Low Noise Integrated VCO

[AK1573/AK1573B/AK1573C]
7. Pin Configurations and Functions
No. Pin Name I/O
Pin function
Power
Down
Description
1
BIAS
AI Charge pump current setting pin
Connect a 27kΩ resistor
to the ground
2 VREF2 AO Internal reference voltage output pin
3
VCNT ^{AI VCO control voltage input pin}
4
SCAP AO VCO Bias stabilizing connection pin
5 VCOVSS G Ground of VCO block
6 VCOVDD P Power supply of VCO block
7
TEST1
DI
TEST1 pin
Connect to the ground
“L”
Connect a 470nF
capacitor to the ground
“L”
Connect a 100pF
capacitor to the ground
Pull Down
Schmitt trigger input
8
TEST2
DI
TEST2 pin
Connect to the ground
Pull Down
Schmitt trigger input
Power down 1 pin. When PDN1 =
9
PDN1 DI “L", device is powered down and the
registers are not retained.
Schmitt trigger input
10 OAVSS G Ground of Local buffer
11 RFOUT_P AO Local signal output pin
12
RFOUT_N
AO
Local signal complementary output
pin
13 PVDD
P Power supply of Prescaler and LDO
14
PVSS
G Ground of Prescaler and LDO
15 VREF1 AO Output pin of LDO
16 REFIN DI Reference signal input pin
Open collector
Connect a inductor and a
register to VDD
“L”
Connect a 220nF
capacitor to the ground
Power down 2 pin. When PDN2
17
PDN2
DI
= ”L”, all blocks except LDO and
VBG are powered down but the
registers are retained
Schmitt trigger input
18
CLK
DI Serial clock input pin.
19 DATA DI Serial data input pin.
20
LE
DI Load enable input pin.
21
LD
DO Lock detect output pin
22 CVPSS G Ground of Charge Pump
23
CP
AO CP signal output pin
24 CPVDD P Power supply of Charge Pump
Schmitt trigger input
Schmitt trigger input
“L”
Tri-State
AI: Analog input pin
DI: Digital input pin
AO: Analog output pin
DO: Digital output pin
AIO: Analog I/O pin
P: Power supply pin
G: Ground pin
* “Power Down” means the state in which power supply is applied and PDN1 / PDN2 pins = "L".
* The exposed pad at the center of the backside should be connected to the ground
015009351-E-00
-5-
2015/8