AK1573 Datasheet, PDF (23/42 Pages) Asahi Kasei Microsystems – Low Noise Integrated VCO

[AK1573/AK1573B/AK1573C]
< Address0x01 : N counter >
D[18:6]
B[12:0] : B (Programmable) counter setting
Set the dividing ratio of B (Programmable) counter.
The setting range is shown in the following table.
B[12:0]
0
1
2
3
:
8191
Programmable counter dividing ratio
-
-
-
3
:
8191
Remark
Prohibited
Prohibited
Prohibited
D[5:0]
A[5:0] : A (Swallow) counter setting
Set the dividing ratio of A (Swallow) counter.
The setting range is shown in the following table.
A[5:0]
0
1
2
:
63
Swallow counter dividing ratio
0
1
2
:
63
Remark
The data at A[5:0] bits and B[12:0] bits must meet the following requirements:
B[12:0] bits ≥ 3, B[12:0] bits ≥ A[5:0] bits
See “13. Frequency Setting” for details of the relationship between a frequency dividing ratio N
and the data at A[5:0] bits and B[12:0] bits.
It is prohibited to set frequency once again until VCO calibration and Fast lock-up mode is
completed.
< Address0x02 : C/P >
D[8: 6]
D[2:0]
CP2[2:0] : Charge pump current setting for Fast Lockup operation
CP1[2:0] : Charge pump current setting for normal operation
AK1573 provides two settings for charge pump current. CP1[2:0] bits are for normal operation
and CP2[2:0] bits are for Fast Lockup mode.
The following formula shows the relationship among the resistance value, the register setting
and the electric current.
Charge pump current (Icp) [A] = Icp_min [A] × [(CP1[2:0] bits or CP2[2:0] bits setting) + 1]
Charge pump minimum current (Icp_min) [A] = 9.45 / BIAS Resistance [Ω]
015009351-E-00
- 23 -
2015/8