AK5536 Datasheet, PDF (48/69 Pages) Asahi Kasei Microsystems – 6-Channel Differential 32-bit  ADC

PW2 PW1 PW0
Power ON/OFF
pin pin pin Ch6 Ch5 Ch4 Ch3 Ch2 Ch1
L
L
L OFF OFF OFF OFF OFF OFF
L
L
H ON ON ON ON ON ON
L H L ON ON ON ON ON ON
L H H ON ON ON ON ON ON
H
L
L ON ON ON ON ON ON
H
L
H ON ON ON ON ON ON
H H L ON ON ON ON ON ON
H H H ON ON ON ON ON ON
Table 13. Channel Power ON/OFF (Parallel Control Mode, ODP pin= “H”)
[AK5536]
PW2 PW1 PW0
Data on Slot
pin pin pin Slot 6 Slot 5
Slot 4
Slot 3
Slot 2
Slot 1
L L L All “0” All “0”
All “0”
All “0”
All “0”
All “0”
L L H All “0” All “0”
All “0”
All “0” (CH5+6)/2 (CH1+2+3+4)/4
L H L All “0” All “0” (CH5+6)/2 (CH5+6)/2 (CH3+4)/2
(CH1+2)/2
L H H All “0” All “0”
All “0”
All “0”
All “0” (CH1+2+3+4+5+6)/6
H L L CH6
CH5
CH4
CH3
CH2
CH1
H L H All “0” All “0”
All “0”
All “0” (CH5+6)/2 (CH1+2+3+4)/4
H H L All “0” All “0” (CH5+6)/2 (CH5+6)/2 (CH3+4)/2
(CH1+2)/2
H H H All “0” All “0”
All “0”
All “0”
All “0” (CH1+2+3+4+5+6)/6
Table 14. Slot Data Assign (Parallel Control Mode, ODP pin= “H”, Normal Output)
PW2 PW1 PW0
Data on Slot
pin pin pin Slot 6 Slot 5
Slot 4
Slot 3
Slot 2
Slot 1
L L L All “0” All “0”
All “0”
All “0”
All “0”
All “0”
L L H All “0” All “0” TDMIN
TDMIN (CH5+6)/2 (CH1+2+3+4)/4
L H L All “0” All “0” (CH5+6)/2 (CH5+6)/2 (CH3+4)/2
(CH1+2)/2
L H H All “0” All “0” TDMIN
TDMIN
TDMIN (CH1+2+3+4+5+6)/6
H L L CH6
CH5
CH4
CH3
CH2
CH1
H L H All “0” All “0” TDMIN
TDMIN (CH5+6)/2 (CH1+2+3+4)/4
H H L All “0” All “0” (CH5+6)/2 (CH5+6)/2 (CH3+4)/2
(CH1+2)/2
H H H All “0” All “0” TDMIN
TDMIN
TDMIN (CH1+2+3+4+5+6)/6
Table 15. Slot Data Assign (Parallel Control Mode, ODP pin= “H”, TDM128)
PW2 PW1 PW0
Data on Slot
pin pin pin Slot 6 Slot 5
Slot 4
Slot 3
Slot 2
Slot 1
L L L All “0” All “0”
All “0”
All “0”
All “0”
All “0”
L L H TDMIN TDMIN TDMIN
TDMIN (CH5+6)/2 (CH1+2+3+4)/4
L H L TDMIN TDMIN (CH5+6)/2 (CH5+6)/2 (CH3+4)/2
(CH1+2)/2
L H H TDMIN TDMIN TDMIN
TDMIN
TDMIN (CH1+2+3+4+5+6)/6
H L L CH6
CH5
CH4
CH3
CH2
CH1
H L H TDMIN TDMIN TDMIN
TDMIN (CH5+6)/2 (CH1+2+3+4)/4
H H L TDMIN TDMIN (CH5+6)/2 (CH5+6)/2 (CH3+4)/2
(CH1+2)/2
H H H TDMIN TDMIN TDMIN
TDMIN
TDMIN (CH1+2+3+4+5+6)/6
Table 16. Slot Data Assign (Parallel Control Mode, ODP pin= “H”, TDM256 & TDM512)
015099885-E-00
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2016/03