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AKD4620B Datasheet, PDF (4/60 Pages) Asahi Kasei Microsystems – Evaluation board AK4620B | |||
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ASAHI KASEI
[AKD4620B-B]
1-3) AK4114âs master clock mode & reference Xâtal frequency
Mode
1
SW3-6
(CM1)
OFF
SW3-7
(CM0)
PLL
X'tal
Clock source SDTO
ON OFF
ON
X'tal
DAUX
Table 4. AK4114âS Clock Operation Mode
(Default)
SW3-1
(XTL1)
ON
SW3-2
(XTL0)
Xâtal Frequency
OFF
24.576MHz
Table 5. Reference Xâtal frequency
(Default)
2) Evaluation of D/A using DIR. (Optical link)
The DIR generates MCLK, BICK, LRCK and SDATA from the received data through optical
connector (PORT1). PORT1 is also used for the evaluation using such as CD test disk.
BNC connector is recommended for an evaluation of the Sound quality.
2-1) DIR input interface (Default: JP2="OPT")
Jumper
JP2
(RX3)
Normal & Double Speed
OPT or BNC
Quard Speed
BNC
Table 6. DIR Input Interface
2-2) Sampling speed & MCLK frequency
a) parallel mode
SW1-1
(P/S)
ON
ON
ON
SW1-4 SW1-6 SW1-7 SW3-4 SW3-5
(DFS0) (CKS1) (CKS0) (OCKS1) (OCKS0)
Sampling
Speed of
AK4620B
MCLK
Frequency of
AK4620B
OFF
OFF
OFF
OFF
OFF
Normal
Speed
256fs
OFF
OFF
ON
ON
OFF
Normal
Speed
512fs
ON
OFF
ON
OFF
OFF
Double
Speed
256fs
Table 7. Sampling Speed & Master clock Frequency in parallel mode
* Parallel mode does not support quad speed mode.
<KM078900>
-4-
2005/05
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