AKD4112B Datasheet, PDF (4/17 Pages) Asahi Kasei Microsystems – AKD4112B EVALUATION BOARD

ASAHI KASEI
[AKD4112B]
n DIP switch(SW1) set-up : -off- means “L”
No. Switch Name
Function
1 IPS0
Don’t care
2 DIF0
DIF0 pin set-up (for parallel mode)
3 DIF1
DIF1 pin set-up (for parallel mode)
4 DIF2
DIF2 pin set-up (for parallel mode)
5 IPS1/IIC
Don’t care
6 P/SN
P/SN pin set-up. “H”: parallel mode, “L”: serial mode.
7 XTL0
Don’t care
8 XTL1
Don’t care
n DIP switch(SW2) set-up : -off- means “L”
No. Switch Name
Function
1 CM1
CM1 pin set-up (for parallel mode)
2 OCKS1
3 OCKS0
4 TEST1
OCKS1 pin set-up (for parallel mode)
OCKS0 pin set-up (for parallel mode)
Don’t care
5-
(reserved)
6-
(reserved)
7-
(reserved)
8-
(reserved)
n Toggle switch set-up
3 PDN
Reset switch for AK4112B and AK4394. Set to “H” during operation. Bring to “L” once
after the power is supplied.
n LED indication
1 INT0
2 INT1
Bright when ERF pin goes to “H”.
Bright when FS96 pin goes to “H”.
n Set-up of AK4394 (for the evaluation via DAC. Refer the AK4394 datasheet)
In case of evaluating via DAC(AK4394), the AK4394 needs to be controlled by serial control. The default set-up of
AK4394 audio format is 16bit right justified, but AK4112B is left justified slave mode. Please adjust those two audio
formats. In detail, please refer those datasheets.
n Set-up of AK4112B (Refer the AK4394 datasheet)
1. MCKO1/2 output
No. OCKS1 OCKS0 MCKO1 MCKO2
X’tal
0
0
0
256fs
256fs
256fs
1
0
1
256fs
128fs
256fs
2
1
0
512fs
256fs
512fs
3
1
1
Test Mode
Table 1. Master Clock Frequency Select
fs (kHz)
32, 44.1, 48, 96
32, 44.1, 48, 96
32, 44.1, 48
Default
<KM065901>
-4-
2002/12