AKD5702-A Datasheet, PDF (3/33 Pages) Asahi Kasei Microsystems – portable digital audio 16bit A/D converter

ASAHI KASEI
[AKD5702-A]
(1) PLL Master Mode (Default)
* Connect PORT4 (DSP1) with DSP.
Figure below shows PORT4 pin assign.
PORT4
MCKO
BCLK
LRCK
SDTOA
VD
GND
GND
NC
NC
SDTOB
a) Set up jumper pins of MCKI clock
When using X’tal as MCKI clock, X’tal of 11.2896MHz, 12MHz, 12.288MHz, 13MHz, 24MHz or 27MHz can
be set to X1. X’tal of 11.2896MHz (Default) is set on the AKD5702-A.
When an external clock (11.2896MHz, 12MHz, 12.288MHz, 13MHz, 24MHz or 27MHz) is supplied through a
BNC connector J1 (EXT_MCKI), select EXT_MCLK on JP16 (XTI) and select EXT on JP7 (MCLK_SEL).
JP12 (EXT) and R19 should be properly selected in order to match the output impedance of the clock generator.
JP16
XTI
JP7
MCKI_SEL
JP5
TDMMCLK_SEL
JP32
MCLK_SEL
JP8
MKFS
MCKO EXT_MCLK DIT
EXT
MCKO EXT_MCLK
*The setting of JP8(MKFS) is invalid in this mode,but if JP8(MKFS) is open, the input of the buffer will be unstable. So
JP8(MKFS) should set up any.
b) Set up jumper pins of BCLK clock
Output frequency (32fs/64fs) of BCLK should be set by “BCKO1-0 bit” in the AK5702.
There is no necessity for set up JP9(BCLKFS).
JP28
M/S
JP9
BCLKFS
JP10
BCLK_SEL
M
S
c) Set up jumper pins of LRCK clock
JP11
LRCKFS
JP13
LRCK_SEL
<KM086501>
-3-
2007 / 04