AKD5700-A Datasheet, PDF (3/39 Pages) Asahi Kasei Microsystems – digital audio 16bit A/D converter

ASAHI KASEI
[AKD5700-A]
(1) Evaluation of PLL, Master Mode (Default)
*Connect PORT2 (DSP1) with DSP.
Figure below shows PORT2 pin assign.
PORT2
MCKO
BCLK
LRCK
SDTO
VD
GND
GND
NC
NC
NC
a) Set up jumper pins of MCKI clock
When using X’tal as MCKI clock, X’tal of 11.2896MHz, 12MHz, 12.288MHz, 13MHz, 24MHz or 27MHz can
be set to X1. X’tal of 11.2896MHz (Default) is set on the AKD5700-A.
When an external clock (11.2896MHz, 12MHz, 12.288MHz, 13MHz, 24MHz or 27MHz) is supplied through
an RCA connector (J3: EXT/BCLK), select EXTCLK/BCLK on JP16 (XTI) and select EXTCLK/BCLK on
JP19 (MCLK_SEL). JP14 (EXT1) and R20 should be properly selected in order to match the output impedance
of the clock generator.
JP16
JP19
JP11
XTI
MCLK_SEL
MKFS
5700-
MCKO
EXTCLK
/BCLK
4114- MCKI EXTCLK
MCKO
/BCLK
256fs 512fs 1024fs MCKO
b) Set up jumper pins of BCLK clock
Output frequency (32fs/64fs) of BCLK should be set by “BCKO1-0 bit” in the AK5700.
There is no necessity for set up JP12.
JP17
JP12
BCLK_SEL
BCLK
EXT EXT EXTBCLK/ BCLK/
BCLK
DIT
DIT
c) Set up jumper pins of LRCK clock
JP18
LRCK_SEL
64fs 32fs 16fs
JP13
LRCK
EXT EXT EXTLRCK/ LRCK/
LRCK DIT
DIT
2fs 1fs
<KM087000>
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2006 / 12