AKD5388-A Datasheet, PDF (3/36 Pages) Asahi Kasei Microsystems – AK5388 Evaluation Board Rev.4

[AKD5388-A]
(1-2) Feeding all clocks from PORT3 (DSP1)
Under the following set-up, all external clocks (MCLK, BICK, LRCK) can be fed through PORT3 (DSP1). The
A/D converted data is output from SDTO1/SDTO2 of PORT3 (DSP1). Also, the A/D converted data is output
through optical connector (TOTX197).
JP4
BICK
JP5
LRCK
JP16
XTE
JP11
XTL
JP17
EXT
XTL EXT
(2) Master mode
(2-1) A/D evaluation using DIT function of AK4101A
PORT1 and PORT2 are used. DIT generates audio bi-phase signal from received data and which is output
through optical connector (TOTX197). It is possible to connect AKEMD’s D/A converter evaluation boards on
the digital-amplifier, which equips DIR input. Nothing should be connected to PORT3 (DSP1) and PORT4
(DSP2). In case of using external clock through a BNC connector (J9), select EXT on JP11 (MCLK) and short
JP16 (XTE) and JP17 (EXT).
JP4
BICK
JP5
LRCK
JP16
XTE
JP11
XTL
JP17
EXT
XTL EXT
(2-2) Feeding all clocks from PORT3 (DSP1)
Under the following set-up, all external clocks (MCLK, BICK, LRCK) can be fed through PORT3 (DSP1). The
A/D converted data is output from SDTO1/SDTO2 of PORT3 (DSP1). Also, the A/D converted data is output
through optical connector (TOTX197).
JP4
BICK
JP5
LRCK
JP16
XTE
JP11
XTL
JP17
EXT
XTL EXT
(3) Cascade TDM mode
(3-1) Evaluation of cascade TDM mode that uses two AKD5388-A
PORT3 (DSP1) and PORT4 (DSP2) are used. In case of using external clock through a BNC connector (J9),
select EXT on JP11 (MCLK) and short JP16 (XTE) and JP17 (EXT).
JP4
BICK
JP5
LRCK
JP16
XTE
JP11
XTL
JP17
EXT
XTL EXT
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2009/03