AK7770EQ Datasheet, PDF (3/22 Pages) Asahi Kasei Microsystems – Audio DSP with Multi-Channel Audio CODEC

[AK7770]
■ Block Diagram
FROL2,FROR2
2
FRIL2,FRIR2
2
VCOM
VREF
AOUTL1,AOUTR1 AOUTL2,AOUTR2
2
2
DAC1
SDINDA1
DAC2
SDINDA2
DAC3
SDINDA3
HPA
HMUTEN
2 ^HPL,HPR
HVCOM
HDT
AINL1,AINR1
AINL2,AINR2
AINL3,AINR3
AINL4,AINR4
ASEL2[1:0]
2
2
2
2
ASEL1[1:0]
ADC2
SDOUTAD2
SDOUTAD1
ADC1
FRIL1,FRIR1
FROL1,FROR1
XTO
2
2
LFLT
XTI
External system clock 0
CLKO
BITCLKO
LRCLKO
CLKGEN
CLKOE
BITCLKO
SELCLK
MCLKO
MBITCLKO
LRCLKOE
MLRCLK
O
internal system clock 0
Internal system clock 3
SDIN3
CLK3
BITCLK3
LRCLK3
External system clock 3
DIV
MCLK3
DIN4
DIN3
DOUT5
DOUT4
SDIN2
CLK2
BITCLK2
LRCLK2
External system clock 2
SDIN1
SRCI2
SRCO2
SRCO2
DIV
SRC
MCLK2 _SRCMCK2
SRCBICK2
SRCLRCK2
UNLOCK2
SRCI1
SRCO1
SRCO1
DIN2
DOUT3
DOUT2
DOUT1
DIN1
External system clock 1
CLK1
BITCLK1
LRCLK1
INITRSTN
TESTI2
CKM[1:0] 2
TESTI
DIV
SRC
MCLK1
SRCMCK1
* CLK0
SRCBICK1
SRCLRCK1
UNLOCK1
CONT
ROM
DSP
WDT
CRC
WDTEN
CRCE
LOCK2E
LOCK1E
Figure 1. Block Diagram
pull down
Hi-z
Open Drain
HVDD
VSS2
3 AVDD
3 VSS1
4 DVDD
34 _DVDD18
4 VSS3
SELCKDIT ^{1 0}
SELDITI[1:0]
3
DIT
2
DIT
1
0
DITO
SELTX[1:0]
0
1
2
TX
3
SELO3[1:0]
3
2
OUT3
1
0
SELO2[1:0]
3
2
OUT2
1
0
SELO1[1:0]
3
2
OUT1
1
0
SO
MICIF
HPEN
STATUS
SDOUT3
SDOUT2
SDOUT1
TESTI3
CAD1
SCL
CAD0
SDA
HPEN
HP Detect "L"
STO
Figure 1shows a simplified diagram of the AK7770, which is not the perfect same as the actual circuit diagram.
MS0699-E-01-PB
-3-
2008/06