AK7770EQ Datasheet, PDF (16/22 Pages) Asahi Kasei Microsystems – Audio DSP with Multi-Channel Audio CODEC

[AK7770]
■ Audio System Interface
1. SDIN1~SDIN3, SDOUT1~SDOUT3
(Ta=-10°C ~70°C; AVDD=HVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V; VSS1 = VSS2 = VSS3=0V; CL=20pF)
Parameter
Symbol min typ max Units
Input
Delay time from BITCLKn “↑”to LRCLK (Note 31) tBLRD
20
ns
Delay time from LRCLKn to BITCLKn “↑” (Note 31) tLRBD
20
ns
Serial data entry latch setup time
tBSIDS
80
ns
Serial data entry latch hold time
tBSIDH
80
ns
Output
BITCLKO frequency
fBCLK
64
fs
BITCLKO duty cycle ratio
50
%
Delay time from BITCLKO “↓” to LRCLKO
tMBL
-20
40
ns
Delay time from LRCLKO to SDOUTn (Only MSB)
tLRD
80
ns
Delay time from BITCLKO to SDOUTn
tBSOD
80
ns
SDINn → SDOUTn
(Note 32)
Delay time from SDINn to SDOUTn
tIOD
50
ns
Note 31. BITCLKn “↑” must not occur at the same time as LRCKn edge
Note 32. SDIN1 → SDOUT1: control register setting SELO1[1:0]= “11”, OUT1E=1
SDIN2 → SDOUT2: control register setting SELO2[1:0]= “11”, OUT2E=1
SDIN3 → SDOUT3: control register setting SELO3[1:0]= “11”, OUT3E=1
MS0699-E-01-PB
- 16 -
2008/06