AK7770EQ Datasheet, PDF (15/22 Pages) Asahi Kasei Microsystems – Audio DSP with Multi-Channel Audio CODEC

[AK7770]
SWITCHING CHARACTERISTICS
■ System Clock
(Ta=-10°C ~70°C; AVDD=HVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V; VSS1 = VSS2 = VSS3=0V)
Parameter
Sysmbol
Min
typ
max
XTI
a) with a crystal oscillator
fXTI
-
12.288
-
b) with an external clock
Duty cycle ratio
40
50
60
fXTI
11.0
12.4
CLK1, CLK2 Frequency (Note 28) fCK
2.0
12.288
50
Duty cycle ratio
40
50
60
Clock speed
256
1024
LRCLK1, LRCLK2 Frequency
fs
8
48
48.4
(Note 29)
BITCLK1, BITCLK2 Frequency
High level width
tBCLKH
150
Low level width
tBCLKL
150
CLK3 Frequency
(Note 28) fCK
11.0
12.288
50
Duty cycle ratio
40
50
60
Clock speed
256
1024
LRCLK3 Frequency
(Note 29)
fs
43
48
48.4
BITCLK3 Frequency
High level width
Low level width
tBCLKH
150
tBCLKL
150
Note 28. CLKn and LRCLKn must occur in the same period, but phase matching is not critical.
Note 29. The sample rate must match LRCLK.
Units
MHz
%
MHz
MHz
%
fs
kHz
ns
ns
MHz
%
fs
kHz
ns
ns
■ Reset
(Ta=-10°C ~70°C; AVDD=HVDD=DVDD=3.0~3.6V; DVDD18=1.7~1.9V; VSS1 = VSS2 = VSS3=0V)
Parameter
Symbol
Min
typ
max
INITRSTN
(Note 30) tRST
600
Note 30. Power supply must be up and a master clock must be present before initializing reset.
Units
ns
MS0699-E-01-PB
- 15 -
2008/06