AK5393 Datasheet, PDF (3/18 Pages) Asahi Kasei Microsystems – Enhanced Dual bit 96 kHz 24-bit ADC

ASAHI KASEI
[AK5393]
No. Pin Name
1 VREFL
2 GNDL
3 VCOML
4 AINL+
5 AINL-
6 ZCAL
7 VD
8 DGND
9 CAL
10
RST
11 SMODE2
12 SMODE1
13 LRCK
PIN/FUNCTION
I/O
Function
O Lch Reference Voltage Pin, 3.75V
Normally connected to GNDL with a 10µF electrolytic capacitor and
a 0.1µF ceramic capacitor.
- Lch Reference Ground Pin, 0V
O Lch Common Voltage Pin, 2.75V
I Lch Analog positive input Pin
I Lch Analog negative input Pin
I Zero Calibration Control Pin
This pin controls the calibration reference signal.
"L" :VCOML and VCOMR
"H" : Analog Input Pins (AINL±, AINR±)
- Digital Power Supply Pin, 3.3V
- Digital Ground Pin, 0V
O Calibration Active Signal Pin
"H" means the offset calibration cycle is in progress. Offset calibration starts
when RST goes "H". CAL goes "L" after 8704 LRCK cycles for DFS="L",
17408 LRCK cycles for DFS ="H".
I Reset Pin
When "L", Digital section is powered-down. Upon returning "H", an
offset calibration cycle is started. An offset calibration cycle should always
be initiated after power-up.
I Serial Interface Mode Select Pin
I MSB first, 2's compliment.
SMODE2 SMODE1
MODE
LRCK
L
L
L
H
H
L
H
H
Slave mode : MSB justified
Master mode : Similar to I²S
Slave mode : I²S
Master mode : I²S
: H/L
: H/L
: L/H
: L/H
I/O Left/Right Channel Select Clock Pin
LRCK goes "H" at SMODE2="L" and "L" at SMODE2="H" during reset
when SMODE1 "H".
M0038-E-04
-3-
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