AK4341 Datasheet, PDF (3/18 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output

ASAHI KASEI
[AK4341]
PIN/FUNCTION
No. Pin Name
I/O Function
1 MCLK
I
Master Clock Input Pin
An external TTL clock should be input on this pin.
2 BICK
I Audio Serial Data Clock Pin
3 SDTI
I Audio Serial Data Input Pin
4 LRCK
I
L/R Clock Pin
Power-Down Mode Pin
5 PDN
I
When at “L”, the AK4341 is in the power-down mode, held in reset and
AOUTL/R are held in VCOM. The AK4341 must be reset once upon
power-up.
6 SMUTE
I
Soft Mute Pin in parallel control mode
“H”: Enable, “L”: Disable
7 ACKS
I
Auto Setting Mode Pin
“L”: Manual Setting Mode, “H”: Auto Setting Mode
8 DIF
I
Audio Data Interface Format Pin
“L”: 24bit MSB Justified, “H”: I2S
9 DEM
I De-emphasis Enable Pin
“H”: Enable, “L”: Disable
10 AOUTR
O
Rch Analog Output Pin
When PDN pin = “L”, outputs VCOM voltage.
11 AOUTL
O
Lch Analog Output Pin
When PDN pin = “L”, outputs VCOM voltage.
12 HVDD
Output Buffer Power Supply Pin
-
Normally connected to VSS with a 0.1μF ceramic capacitor in parallel with a
10μF electrolytic cap.
13 VSS
- Ground Pin
14 VDD
- DAC Power Supply Pin
DAC Common Voltage Pin
15 VCOM
O
Normally connected to VSS with a 10μF electrolytic cap.
Outputs VCOM VDD voltage either PDN pin = “L” or “H”.
Gain Control Pin.
“H”: +6dB, “L”: 0dB, open: +12dB.
16 GAIN
I
When PDN=“H”, the Gain pin is connected to VDD and VSS with 50kΩ
resisters and held to VDD/2 when open. When PDN=“L”, connected to VSS
with 50kΩ resister.
Note: All input pins except for the GAIN pin should not be left floating.
MS0558-E-01
-3-
2007/03