AKD7780 Datasheet, PDF (23/48 Pages) Asahi Kasei Microsystems – 24-bit stereo ADC’s, a mono ADC and a stereo SRC.

5
4
3
HEADER 2
default short
1
2
JP2
AVDD
HEADER 2
default short
1
2
JP3
JP4
+ C15
10uF(A)
AVDD_SRC
1
2
3
4
5
6
D
7
8
AINM
9
10
AINR4
11 12
AINL4
13 14
AINR3
15 16
AINL3
17 18
AINR2
19 20
AINL2
21 22
AINRN
23 24
AINRP
25 26
AINLN
27 28
AINLP
29 30
AINR5
31 32
AINL5
33 34
AINR6
35 36
AINL6
37 38
AINR7
39 40
AINL7
41 42
AINR8
43 44
AINL8
45 46
+ C16
10uF(A)
AVDD_AD
47 48
49 50
JP5
HEADER 25X2
default short
2
1
AVSS_CHIP
HEADER 2
C
2
1
D
DVDD18
C
DVDD18_CHIP
HEADER 2
default short
1
2
JP6
JP7
+ C17
10uF(A)
1
2
3
4
5
6
7
8
9
10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
TEST1
I2CSEL
SRCSET1
SRCSET0
MCLK
CKM1
CKM0
CKM2
LRCLK_O
BITCLK_O
SDOUT1
SDOUT2
SDOUT3
SDOUT4
SDOUT5
B
HEADER 15X2
JP8
TEST2
P_SRC_SMUTE
P_SRC_RESET
X_SDA
SRC_LRCK
SRC_BICK
SDIN1
JX0
JX1
JX2
CLKO2
SDOUT6
SDOUTA1
STO
RDY
30 29
28 27
26 25
24 23
22 21
20 19
18 17
16 15
14 13
12 11
10
9
8
7
6
5
4
3
2
1
+ C18
10uF(A)
HEADER 15X2
B
DVSS_CHIP
DVDD
HEADER 2
JP9
default short
2
1
HEADER 2
default short
1
2
JP10
DVDD_CHIP
JP11
1
2
CLKO1
3
4
SDIN2
5
6
SDIN3
7
8
SDIN4
9
10
SDIN5
+ C19
10uF(A)
11 12
13 14
15 16
BITCLK_I
LRCLK_I
IRESET
17 18
P_CK_RESET
19 20
P_AD_RESET
21 22
P_DSP_RESET
23 24
X_RQ_N
A
25 26
X_SI
A
27 28
X_SCLK
29 30
X_SO
HEADER 15X2
Title
AK7780 HEADER
Size
Document Number
Rev
A3 <Doc>
A
Date:
Friday, July 07, 2006
Sheet
3
of 8
5
4
3
2
1