AK2346B Datasheet, PDF (21/31 Pages) Asahi Kasei Microsystems – Two-way Radio Audio Processor

ASAHI KASEI
[AK2346B]
2) MSK Modulator Timing
Parameter
Symbol Min.
TXSW2 Falling to TCLK Rising MSKSL=”0”
MSKSL=”1”
T1
TCLK Period
MSKSL=”0”
MSKSL=”1”
T2
TXSW2 Rising to TXSW1 Falling
T3
2
TDATA Set up time
TDATA Hold time
TDATA Hold time2
TS
1
TH
1
TH2
2
Typ.
208.3
416.7
416.7
833.3
Max.
Units
us
us
ms
us
TCLK
TXSW 1
Register data
TXSW 2
TDATA
T1
T2
TS
TH
MOD
(M S KS L=”0”)
Audio Signal
(M S KS L=”1”)
T3
TH2
Audio Signal
Note: The timing of setting the internal registers TXSW1 and TXSW2 is synchronized with the falling
edge of DIR pin.
3) MSK Demodulator Timing
Parameter
Symbol
Min.
RCLK Period and FD pulse width
MSKSL=”0”
T
MSKSL=”1”
RDF Falling to SCLK Falling time
tj
100
SCLK Rising to RDF Falling time
tk
600
Typ.
416.7
833.3
Max.
Units
us
ns
MS1409-E-00
- 21 -
2012/05