AK1590 Datasheet, PDF (20/36 Pages) Asahi Kasei Microsystems – 1GHz Delta-Sigma Fractional-N Frequency Synthesizer

[AK1590]
Name Data
Address
Num
0001
Int
0010
Div
0011
D19 to D0
Cp_fast
0100
GPO
0101
Offset
0110
9. Register Map
Name D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Address
Num
0
0
NUM NUM NUM NUM NUM
[17] [16] [15] [14] [13]
NUM
[12]
NUM NUM NUM NUM NUM NUM NUM NUM NUM NUM NUM NUM
[11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
0x01
Int
Div
0
0
CP1 CP1 CP1 INT
[2] [1] [0] [14]
INT
[13]
INT
[12]
INT
[11]
INT
[10]
INT
[9]
INT
[8]
INT
[7]
INT
[6]
INT
[5]
INT
[4]
INT
[3]
INT
[2]
INT
[1]
INT
[0]
0x02
00 0
0
CP
HiZ
DITH
LDCK
SEL[1]
LDCK
SEL[0]
LD
CP PRE
POLA [1]
PRE
[0]
R
[7]
R
[6]
R
[5]
R
[4]
R
[3]
R
[2]
R
[1]
R
[0]
0x03
Cp_fast ⁰
0
0
FAST CP2 CP2
EN [2] [1]
CP2
[0]
FAST
[12]
FAST FAST FAST FAST FAST FAST FAST FAST FAST FAST FAST FAST
[11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
0x04
GPO ^{0 0 0 0 0 0 0}
0
00
00
0
000
0
0
GPO GPO
2
1
0x05
Offset
0
0
OFST OFST OFST OFST OFST
[17] [16] [15] [14] [13]
OFST OFST OFST OFST OFST OFST OFST OFST OFST OFST OFST OFST OFST
[12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0]
0x06
Note 1)
Note 2)
Writing into address 0x01 is enabled when writing into address 0x02 is performed. Be sure to write into address
0x01 first and then address 0x02.
The initial register values are not defined just after [PDN1] releases ([PDN1] set to “High”). Therefore, even
after [PDN1] is set to “High”, each bit value remains undefined. In order to set all register values, it is required to
write the data in all addresses of the register.
MS1478-E-01
20
2013/2