AK1590 Datasheet, PDF (19/36 Pages) Asahi Kasei Microsystems – 1GHz Delta-Sigma Fractional-N Frequency Synthesizer

[AK1590]
6. Reference Input
The reference input can be set with a dividing number in the range of 4 to 255 using {R[7:0]}, which is a 8-bit address in
<Address3>. A dividing number from 0 to 3 cannot be set.
7. Prescaler and Swallow Counter
The dual modulus prescaler (P/P+1) and the swallow counter are used to provide a large dividing ratio.
The prescaler is set by {PRE[1:0]}, which is a 2-bit address in <Address3>.
When {PRE[1:0]} =”00”, P = 4 is selected and then an integer from 89 to 8191 can be set.
When {PRE[1:0]} =”01”, P = 8 is selected and then an integer from 201 to 16383 can be set.
When {PRE[1:0]} =”10” or “11”, P = 16 is selected and then an integer from 521 to 32767 can be set.
For details of how to calculate an integer, see the section “Frequency Setup” in “8. Block Functional Description”.
8. Operation Mode
AK1590 can be operated in Power Down or Power Save mode as necessary by using the external control pins [PDN1]
and [PDN2].
 Power On
See “13. Power-up Sequence”.
 Normal Operation
Pin name
PDN1
PDN2
“Low”
“Low”
“Low”
“High”
“High”
“Low”
“High” “High”
Mode
Power Down mode
Prohibited
Power Save mode (Note 1 and Note 2)
Normal Operation mode
Note 1) Registers setting can be acceptable after 50s from [PDN1] is set to “High”. The charge pump is in
Hi-Z state during this period.
Note 2) Registers value are maintained when [PDN2] is set to “Low” during normal operation mode.
MS1478-E-01
19
2013/2