AKD5367A-A Datasheet, PDF (2/38 Pages) Asahi Kasei Microsystems – AK5367A Evaluation Board Rev.0

[AKD5367A-A]
Operation Sequence
1) Set up the power supplies lines. (Note 1)
Connector
name
AVDD
DVDD
CVDD
D3V
AGND
DGND
Connector
color
Orange
Red
Red
Red
Black
Black
Voltage
+4.75~+5.25
V
+3.0~+3.6V
+3.0~+3.6V
+3.0~+3.6V
0V
0V
Used for
Comment and attention
AVDD for AK5367A, This connector must be connected.
Regulator T1.
This connector is used when DVDD of AK5367A is
DVDD for AK5367A supplied from DVDD connector without regulator T1.
In this case, JP2 should be open. (Default)
This connector is used when CVDD of AK5367A is
CVDD for AK5367A supplied from CVDD connector without regulator T1.
In this case, JP3 should be open. (Default)
AK4104,
Logic circuit
This connector is used when power of AK4104 and
logic circuit is supplied from +3.3V connector without
regulator T1. In this case, JP4 should be open. (Default)
Analog ground
This connector must be connected.
This connector is used when DGND is supplied
Digital ground
separately from AGND. In this case, JP1 should be
open. (Default)
Table 1. Power Supply Lines
Default
Setting
+5V
+3.3V
+3.3V
+3.3V
0V
0V
Note 1. Each supply line should be distributed from the power supply unit.
2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.)
3) Power on.
The AK5367A and AK4104 should be reset once bringing SW1 and SW2 = “L” and return it to “H” to upon
power-up.
Evaluation Mode
(1) Slave mode
When evaluating the AK5367A using the AK4104, the setting of the AK5367A’s audio interface format
should be the same as the AK4104’s format. When the AK4104 is used, the audio interface format is the
default setting of 16/24bit I2S compatible. Therefore, set DIF bit=”1” to agree with the AK4104’s format.
(1-1) A/D evaluation using AK4104 DIT function
PORT1 (DIT) is used. DIT generates audio bi-phase signal from received data and it is output through optical
connector (TOTX141). It is possible to connect AKEMD’s D/A converter evaluation boards on the
digital-amplifier. The clock can be generated from crystal oscillator X1 or be input from J11 (BNC) or PORT2
(ROM).
<KM095000>
-2-
2008/06