AK8180A Datasheet, PDF (2/12 Pages) Asahi Kasei Microsystems – 2.5V, 3.3V LVCMOS 1:10 Clock Fanout Buffer

AK8180A
Pin Descriptions
VDDA
QA2
GND
QA1
VDDA
QA0
GND
MR/OE
24 23 22 21 20 19 18 17
25
16
26
15
27
14
28
13
AK8180A
29
12
30
11
31
10
32
9
12345678
QC3
GND
QC2
VDDC
QC1
GND
QC0
VDDC
Package: 32-Pin LQFP(Top View)
Pin No.
1
2
3
4
5
6
7
8,
9
10
11
12
Pin Name
CCLK_SEL
VDD
CCLK0
CCLK1
DSELA
DSELB
DSELC
GND
VDDC
QC0
GND
QC1
Pin
Type
IN
--
IN
IN
IN
IN
IN
--
--
OUT
--
OUT
Pullup
/down
PD
--
PU
PU
PD
PD
PD
--
--
---
--
---
Description
CCLK Select Input.
Power Supply for Core
Clock Inputs
Clock Inputs
Divide Select Input for Output Bank A
Divide Select Input for Output Bank B
Divide Select Input for Output Bank C
Ground
Power Supply for Output bank C
Clock output Bank C
Ground
Clock output Bank C
(continued on next page)
Mar-2011
-2-
MS1281-E-00