AK4440 Datasheet, PDF (19/31 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit 8ch DAC with 2Vrms Output

[AK4440]
■ System Reset
The AK4440 is in power down mode upon power-up. The MLCK should be input after the power supplies are ramped
up. The AK4440 is in power-down mode until LRCK are input.
t_W<20ms
Power Supply ^0.8xVDD
(VDD, AVDD) ^0.3V
(1)
MCLK
Internal
Reset
Audio circuit
20 µs
(3)
10ms (max)
(2)
Reset
Charge Pump ^{Power down}
Circuit
VEE Pin
0V
8~10
LRCK Clocks
(4)
Time A
(5)
D/A In
(Digital)
0V
D/A Out
(Analog)
“0” data
MUTE (D/A Out)
Reset Release
Power-up
Power-up
Active (D/A Out)
Notes:
(1) The AK4440 includes an internal Power on Reset Circuit which is used reset the digital logic into a default state
after power up. Therefore, the power supply voltage must reach 80% VDD from 0.3V in less than 20msec.
(2) Register writings are valid after 10ms (max).
(3) When internal reset is released, approximately 20us after a MCLK input, the internal analog circuit is powered-up.
(4) The digital circuit and charge pump circuit are powered-up in 8~10 LRCK cycles when the analog circuit is
powered-up.
(5) The charge pump counter starts after the charge pump circuit is powered-up. The DAC outputs a valid analog signal
after Time A.
Time A = 1024/(fs x 16): Normal speed mode
Time A = 1024/(fs x 8): Double speed mode
Time A = 1024/(fs x 4): Quad speed mode
Figure 19. System Reset Diagram
MS1088-E-01
- 19 -
2011/03