AK4440 Datasheet, PDF (13/31 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit 8ch DAC with 2Vrms Output

[AK4440]
■ Audio Serial Interface Format
In parallel control mode, the DIF0 and TDM0B pins as shown in Table 7 can select four serial data modes. The register
value of DIF0 and TDM0B bits are ignored. In serial control mode, the DIF2-0 and TDM1-0 bits shown in Table 8 can
select 11 serial data modes. Initial value of DIF2-0 bits is “010”. In all modes the serial data is MSB-first, 2’s
complement format and is latched on the rising edge of BICK. Mode 2 can be used for 16/20 MSB justified formats by
zeroing the unused LSBs.
In parallel control mode, when the TDM0B pin = “L”, the audio interface format is TDM256 mode (Table 7). The audio
data of all DACs (eight channels) are input to the SDTI1 pin. The input data to SDTI2-4 pins are ignored. BICK should
be fixed to 256fs.
In serial control mode, when the TDM0 bit = “1” and the TDM1 bit = “0”, the audio interface format is TDM256 mode
(Table 8), and the audio data of all DACs (eight channels) are input to the SDTI1 pin. The input data to the SDTI2-4
pins are ignored. BICK should be fixed to 256fs. “H” time and “L” time of LRCK should be at least 1/256fs. The audio
data is MSB-first, 2’s complement format. The input data to the SDTI1 pin is latched on the rising edge of BICK. In
TDM128 mode (TDM1-0 bits = “11”, Table 8), the audio data of DACs (four channels; L1, R1, L2, R2) are input to the
SDTI1 pin. The other four data (L3, R3, L4, R4) are input to the SDTI2 pin. The input data to SDTI3-4 pins are
ignored. BICK should be fixed to 128fs. The audio data is MSB-first, 2’s complement format. The input data to
SDTI1-2 pins are latched on the rising edge of BICK.
Mode
2
Normal
3
5
TDM256
6
TDM0B pin DIF0 pin SDTI Format
LRCK
H
L
24-bit MSB Justified H/L
H
H
24-bit I²S Compatible L/H
L
L
24-bit MSB Justified
↑
L
H
24-bit I²S Compatible ↓
Table 7. Audio Data Formats (Parallel control mode)
BICK
≥48fs
≥48fs
256fs
256fs
Figure
Figure 8
Figure 9
Figure 10
Figure 11
Mode
0
1
Normal
2
3
4
TDM256 5
6
7
TDM128 8
9
10
TDM1
bit
TDM0
bit
DIF2
bit
DIF1
bit
DIF0
bit
SDTI Format
LRCK
0
0
0
0
0 16-bit LSB Justified H/L
0
0
0
0
1 20-bit LSB Justified H/L
0
0
0
1
0 24-bit MSB Justified H/L
0
0
0
1
1 24-bit I²S Compatible L/H
0
0
1
0
0 24-bit LSB Justified H/L
0
1
0
0
0 N/A
0
1
0
0
1 N/A
0
1
0
1
0 24-bit MSB Justified
↑
0
1
0
1
1 24-bit I²S Compatible ↓
0
1
1
0
0 24-bit LSB Justified
↑
1
1
0
0
0 N/A
1
1
0
0
1 N/A
1
1
0
1
0 24-bit MSB Justified
↑
1
1
0
1
1 24-bit I²S Compatible ↓
1
1
1
0
0 24-bit LSB Justified
↑
Table 8. Audio Data Formats (Serial control mode) (N/A: Not available)
BICK
≥32fs
≥40fs
≥48fs
≥48fs
≥48fs
256fs
256fs
256fs
128fs
128fs
128fs
Figure
Figure 6
Figure 7
Figure 8
Figure 9
Figure 7
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
MS1088-E-01
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2011/03