AK4384_06 Datasheet, PDF (18/24 Pages) Asahi Kasei Microsystems – 106dB 192kHz 24-Bit 2ch ΔΣ DAC

ASAHI KASEI
[AK4384]
DZFM: Data Zero Detect Mode
0: Channel Separated Mode
1: Channel ANDed Mode
If the DZFM bit is set to “1”, the DZF pins of both channels go to “H” only when the input data at both
channels are continuously zeros for 8192 LRCK cycles.
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
02H Control 3
0
0
0
INVL INVR DZFB
0
0
default
0
0
0
0
0
0
0
0
DZFB: Inverting Enable of DZF
0: DZF goes “H” at Zero Detection
1: DZF goes “L” at Zero Detection
INVR: Inverting Lch Output Polarity
0: Normal Output
1: Inverted Output
INVL: Inverting Rch Output Polarity
0: Normal Output
1: Inverted Output
Addr
03H
04H
Register Name
Lch ATT
Rch ATT
default
D7
ATT7
ATT7
1
D6
ATT6
ATT6
1
D5
ATT5
ATT5
1
ATT = 20 log₁₀ (ATT_DATA / 255) [dB]
00H: Mute
D4
ATT4
ATT4
1
D3
ATT3
ATT3
1
D2
ATT2
ATT2
1
D1
ATT1
ATT1
1
D0
ATT0
ATT0
1
MS0176-E-01
- 18 -
2006/01