|
AK4356 Datasheet, PDF (17/29 Pages) Asahi Kasei Microsystems – 192kHz 24 Bit IX-CHANNEL DAC FOR DVD-AUDIO | |||
|
◁ |
ASAHI KASEI
[AK4356]
n Zero detection
The AK4356 has channel-independent zeros detect function. When the input data at each channel is continuously zero for
8192 LRCK cycles, DZF pin of each channel goes to âHâ. DZF pin of each channel immediately goes to âLâ if input data
of each channel is not zero after going DZF âHâ. If RSTN bit is â0â, DZF pins of all channels go to âHâ. DZF pins of all
channels go to âLâ 4/fs after RSTN bit returns to â1â. If DZFM bit is set to â1â, DZF pins of all channels go to âHâ only
when the input data at all channels are continuously zeros for 8192 LRCK cycles. Zero detect function can be disabled by
DZFE bit. In this case, DZF pins of all channels are always âLâ (except for the case of RSTN = â0â).
n Soft mute operation
Soft mute operation is performed at digital domain. When the SMUTE pin goes to âHâ, the output signal is attenuated by
-Â¥ during 1024 LRCK cycles. When the SMUTE pin is returned to âLâ, the mute is cancelled and the output attenuation
gradually changes to 0dB during 1024 LRCK cycles. If the soft mute is cancelled within 1024 LRCK cycles after starting
the operation, the attenuation is discontinued and returned to 0dB. The soft mute is effective for changing the signal source
without stopping the signal transmission.
SMUTE
0dB
Attenuation
1024/fs
(1)
1024/fs
(3)
-Â¥
GD
GD
(2)
AOUT
(4)
DZF
8192/fs
Notes:
(1) The output signal is attenuated by -Â¥ during 1024 LRCK cycles (1024/fs).
(2) Analog output corresponding to digital input have the group delay (GD).
(3) If the soft mute is cancelled within 1024 LRCK cycles, the attenuation is discontinued and returned to 0dB.
(4) When the input data at each channel is continuously zeros for 8192 LRCK cycles, DZF pin of each channel goes to
âHâ. DZF pin immediately goes to âLâ if input data are not zero after going DZF âHâ.
Figure 5. Soft mute and zero detection
n System Reset
The AK4356 should be reset once by bringing PDN = âLâ upon power-up. The AK4356 is powered up and the internal
timing starts clocking by LRCK âÂâ after exiting reset and power down state by MCLK. The AK4356 is in the power-down
mode until MCLK and LRCK are input.
M0072-E-01
- 17 -
1999/09
|
▷ |