AK4340_06 Datasheet, PDF (16/23 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output

ASAHI KASEI
„ Reset Function
[AK4340]
When RSTN=0, DAC is powered down but the internal register values are not initialized. The analog outputs go to
VCOM voltage and DZF pin goes to “H”. Figure 7 shows the example of reset by RSTN bit.
RSTN bit
Internal
RSTN bit
3~4/fs (6)
2~3/fs (6)
Internal
State
D/A In
(Digital)
D/A Out
(Analog)
Clock In
MCLK,LRCK,BICK
External
MUTE
Normal Operation
(1)
GD
Digital Block Power-down
Normal Operation
“0” data
(3) (2)
(3)
(4)
Don’t care
GD (1)
Mute ON
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs go to VCOM voltage (VDD/2).
(3) Click noise occurs at the edges(“↑ ↓”) of the internal timing of RSTN bit. This noise is output even if “0” data is
input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the reset mode (RSTN = “L”).
(5) DZF pins go to “H” when the RSTN bit becomes “0”, and go to “L” at 2/fs after RSTN bit becomes “1”.
(6) There is a delay, 3~4/fs from RSTN bit “0” to the internal RSTN bit “0”, and 2~3/fs from RSTN bit “1” to the
internal RSTN “1”.
Figure 13. Reset Sequence Example
MS0501-E-00
- 16 -
2006/04