AK4414EQ Datasheet, PDF (14/51 Pages) Asahi Kasei Microsystems – High Performance 120dB 32-Bit 4ch DAC

[AK4414]
スイッチング特性
(Ta=25°C; VDD1/2=4.75 ∼ 5.25V, AVDD=DVDD=2.7 ∼ 3.6V)
Parameter
Symbol
min
typ
max
Unit
Master Clock Timing
Frequency
fCLK
2.048
41.472
MHz
Duty Cycle
dCLK
40
60
%
LRCK Frequency (Note 16)
Normal Mode (TDM0= “L”, TDM1= “L”)
1152fs, 512fs or 768fs
256fs or 384fs
128fs or 192fs
Duty Cycle
fsn
8
fsd
54
fsq
108
Duty
45
54
kHz
108
kHz
216
kHz
55
%
TDM256 mode (TDM0= “H”, TDM1= “L”)
Normal Speed Mode High time
Low time
TDM128 mode (TDM0= “H”, TDM1= “H”)
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
High time
Low time
PCM Audio Interface Timing
fsn
tLRH
tLRL
fsn
fsd
fsq
tLRH
tLRL
8
1/256fs
1/256fs
8
54
108
1/128fs
1/128fs
54
kHz
ns
ns
54
kHz
108
kHz
216
kHz
ns
ns
Normal Mode (TDM0= “L”, TDM1= “L”)
BICK Period
1152fs, 512fs or 768fs
tBCK 1/128fsn
ns
256fs or 384fs
tBCK
1/64fsd
ns
128fs or 192fs
tBCK
1/64fsq
ns
BICK Pulse Width Low
tBCKL
14
ns
BICK Pulse Width High
tBCKH
14
ns
BICK “↑” to LRCK Edge
(Note 17) tBLR
14
ns
LRCK Edge to BICK “↑”
(Note 17) tLRB
14
ns
SDATA Hold Time
tSDH
5
ns
SDATA Setup Time
tSDS
5
ns
TDM256 mode (TDM0= “H”, TDM1= “L”)
BICK Period
Normal Speed Mode
tBCK 1/256fsn
ns
BICK Pulse Width Low
tBCKL
14
ns
BICK Pulse Width High
tBCKH
14
ns
BICK “↑” to LRCK Edge
(Note 17) tBLR
14
ns
LRCK Edge to BICK “↑”
(Note 17) tLRB
14
ns
SDATA1/2 Hold Time
tSDH
5
ns
SDATA1/2 Setup Time
tSDS
5
ns
MS1476-J-00
- 14 -
2013/01