AK2300 Datasheet, PDF (13/19 Pages) Asahi Kasei Microsystems – 3.3V Single channel PCM CODEC LSI

BLOCK
AMPT
AAF
CODEC
A/D
CODEC
D/A
SMF
BGREF
PCM I/F
[AK2300]
CIRCUIT DESCRIPTION
FUNCTION
Op-amp for input gain adjustment. This op-amp is used as an inverting amplifier.
Adjusting the gain with external resistors. The resistor should be larger than
10kohm for the feedback resistor.
VFTN: Negative op-amp input.
GST: Op-amp output.
Integrated anti-aliasing filter which prevents signals around the sampling rate
from folding back into the voice band. AAF is a 2nd order RC active low-pass filter.
Converting the analog signal to 14bits linear data. And it is PCM data according to
the companding schemes of ITU recommendation G.711; A-law or u-law. The
band limiting filter is also integrated.
The selection of companding schemes(A-law/ and interface timing are set by
DIF0/1pins.
Converting the 14bits linear PCM data or 8bits PCM data accroding to A-law /
u-law.
The selection of expanding schemes and interface timing are set by DIF0/1pins.
Extracts the inband signal from D/A output. It also corrects the sinx/x effect of the
D/A output.
Provide the stable analog reference voltage using an on-chip band-gap reference
circuit which is temperature compensated. The output voltage is 1.3V for 3.3V
An external capacitor of 0.1uF should be connected between VREF and
VSS to stabilize analog ground (VREF).
Please do not connect external load to this pin.
For the PCM data rate, 64kHz ´ N (N=1~32) are available.
The 8bit PCM data is input/output by A/u-law data.
The 14bit PCM data is input/output by the 2’s compliment 16bit serial data format.
PCM data is input to DR pin and output from DX pin.
The selection of interface timing is selected by DIF0/1 pins.
DIF0
“L” : A-law
“H” : u-law
“FS” : Linear
DIF1
“H” : MSB of DX/DR are input/output by rising edge of FS
“L” : MSB of DX/DR are input/output by next rising edge
of BCLK after the rising edge of FS.
<MS0998-E-00>
13
2008/9