AK2306 Datasheet, PDF (12/38 Pages) Asahi Kasei Microsystems – Dual PCM CODEC for ISDN/VoIP TERMINAL ADAPTER

ASAHI KASEI
[AK2306/LV]
MUTE
The output on each channel can be muted independently through the CPU register as shown in the table.
Mute register( Address:100 Bit:5,4 )
MTCH0,1
Operation
DX pin
VRX pin
0
Normal
PCM data output
CODEC
analog output
1
Mute
High-Impedance(*
1)
AGND*
(*1)
MTCH0 and MTCH1 are the mute control bit for CH0 and CH1,respectively. B1 and B2 channel muted by MTCH0/1 is
defined by SEL2B bit shown in the PCM Interface section.
<EXAMPLE>
LF Mode CH0 mute (MTCH=1, MTCH1=0, SEL2B=0)
FS0
BCLK
DX
12345678
DR
Don’t care
1
2
3
4
5
6
7
8
Don’t
care
B1-CHANNEL(CH0)
<SEL2B=”0”>
B2-CHANNEL(CH1)
<SEL2B=”0”>
VRX0 : _{CODEC CH0 analog output is always at AGND level.}
VRX1 : _{CODEC CH1 analog output is the signal converted from the PCM data of CH1 input through DR pin.}
GCI mode CH0 mute (MTCH0=1, MTCH1=0, SEL2B=0)
FS0
BCLK
DX
12345678
DR
Don’t care
1
2
3
4
5
6
7
8
Don’t
care
B1-CHANNEL(CH0)
<SEL2B=”0”>
B2-CHANNEL(CH1)
<SEL2B=”0”>
VRX0 : _{CODEC CH0 analog output is always at AGND level.}
VRX1 : _{CODEC CH1 analog output is the signal converted from the PCM data of CH1 input through DR pin.}
MS0093-E-04
12
2001/11