TSI-8 Datasheet, PDF (1/25 Pages) Agere Systems – 8K x 8K Time-Slot Interchanger

Hardware Design Guide, Revision 1
November 2, 2005
TSI-8
8K x 8K Time-Slot Interchanger
1 Introduction
The last issue of this data sheet was May, 2002 (This docu-
ment was previously labeled Advance Information.) A
change history is included in 9 Change History on page 25.
Red change bars have been installed on all text, figures,
and tables that were added or changed. All changes to the
text are highlighted in red. Changes within figures, and the
figure title itself, are highlighted in red, if feasible. Formatting
or grammatical changes have not been highlighted. Deleted
sections, paragraphs, figures, or tables will be specifically
mentioned.
If the reader displays this document in Acrobat Reader^®,
clicking on any blue entry in the text will bring the reader to
that reference point.
This document describes the hardware interfaces to the
Agere Systems Inc. TSI-8 device. Information relevant to
the use of the device in a board design is covered. Ball de-
scriptions, dc electrical characteristics, timing diagrams, ac
timing parameters, packaging, and operating conditions are
included.
1.1 Related Documents
More information on the TSI-8 is contained in the following
documents:
„ TSI-8 Product Description
„ TSI-8 Register Description
„ TSI-8 Systems Design Guide
2 Description
2.1 Block Diagram and High-Level Interface Definition
TEST ACCESS
PORT
32
RECEIVE
CHI
TEST PATTERN
MONITOR
8K X 8K SWITCH
FABRIC
DATA
STORE
TEST PATTERN
GENERATOR
TRANSLATION
TABLE LOOKUP
TRANSMIT
32
CHI
CLOCK
GENERATOR
WRITE ADDRESS
COUNTER
CONNECTION
STORE
READ ADDRESS
COUNTER
MICROPROCESSOR
INTERFACE
Figure 2-1. Block Diagram and High-Level Interface Definition