CT1775 Datasheet, PDF (9/14 Pages) Aeroflex Circuit Technology – CT1775 Universal MacAir/1553 Dumb RTU Hybrid

PIN
#
NAME
1 GND
2 +5V OSC/
CLOCK POWER
3 NC
4 TX INHIBIT
5 SYNC SELECT
6 SERIAL DATA OUT
7 ESC OUT
8 NC
9 COMM / DATA SYNC
10 MRST
11 VALID WORD
12 BIT STATUS
13 LATCH DATA 1
14 VAL CMD WD
15 BDCST INH
16 TMADD1*
17 TMADD3*
18 XTAL
19 CLOCK OUT
20 TAKE DATA
SCDCT1775 Rev B
PIN FUNCTION AND LOADING TABLE
I_IH I_IL I_OH I_OL
(µA) (mA) (mA) (mA)
DESCRIPTION
Power supply and logic return.
+5V Power for oscillator and clock driver.
No connection.
20 -0.4
A LOW on this input inhibits the transmitter.
20 -0.4
A LOW on this input results in a transmitted DATA sync. A
HIGH on this input results in a transmitted COMMAND
(or STATUS) sync.
-0.4 4.0 Received serial data in NRZ format is available at this
output when TAKE DATA is LOW.
-0.4 4.0 LOW to HIGH transitions on this output when SEND
DATA is HIGH causes the transmit cycle data shifting to
occur.
No connection.
-.36 3.6 A LOW on this output indicates receipt of a DATA word. A
HIGH indicates receipt of a COMMAND (or STATUS)
word.
40 -0.8
A LOW on this input (1 µsec minimum) resets the
decoderto its initialized condition (same function as DEC
RST), resets FAIL-SAFE, and stops and clears the transmit
cycle. This function interrupts and overridesall
othercontrols.
-0.4 4.0 A LOW on this output indicates receipt of a valid word.
-0.4 4.0 A LOW on this output, during wrap around self test only,
indicates that the last word decoded was identical to the last
word encoded.
20 -0.4
A HIGH on this input causes parallel tri-state I/O data on
D8 through D15 to appear at the output of the first rank
transmit register. A LOW locks out the register inputs.
-0.4 4.0 A LOW on this output indicates the receipt of a valid
command word.
20 -0.4
A LOW on this input inhibits the indication of the
BROADCAST output flag.
20 -0.4
Part of 5 bit hard-wired terminal address input.
20 -0.4
Part of 5 bit herd-wired terminal address input.
A 12 MHz parallel resonant crystal is connected between
this input and ground.
-1.0 1.0 Output of oscillator and clock driver (see text).
-0.4 4.0 A LOW on this output indicates that received data is being
shifted into the first rank register and is available at
SERIAL DATA OUT. A LOW to HIGH transition transfers
the contents of the first rank receiver register to the second
rank register.
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