CT1775 Datasheet, PDF (6/14 Pages) Aeroflex Circuit Technology – CT1775 Universal MacAir/1553 Dumb RTU Hybrid

SERIAL DATA OUT
SYNC
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 P
19 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 0
ESE OUT
START
CYCLE
STROBE
SYNC
STROBE DATA
DATA SENT
END CYCLE
ENC ENABLE
DON’T CARE
SYNC SEL
VALID SYNC
DON’T CARE
SEND DATA
(LOAD DATA)
16µs
LATCH DATA
TRI-STATE DATA
VALID DATA
DON’T CARE
DON’T CARE
DATA SELECT
DON’T CARE
FIGURE 2 – TRANSMIT MODE TIMING
SERIAL DATA IN
DSC OUT
TAKE DATA
COMM / DATA SYNC
SYNC
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 P
SYNC
15 14 13
19 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 0 1 2 3 4 5
START CYCLE
TAKE DATA
STROBE DATA
END CYCLE
PREVIOUS STATE
16µs
CURRENT SYNC
SERIAL DATA OUT
PREVIOUS STATE
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
UNDEFINED
15
DATA SELECT ¹
TRI-STATE DATA ¹
DON’T CARE
CURRENT DATA
VALID WORD ²
PREVIOUS STATE
FLAG OUTPUTS³
PREVIOUS STATE
NOT VALID
FLAGS VALID ³
BIT STATUS ⁴
NOT VALID
BIT STATUS VALID⁴
NOTES:
1. Parallel data is held continuously in second rank receiver register, and may be enabled onto the tri-state output at any time with a LOW on DATA SELECT.
2. VALID WORD will remainLOW for 20µsec then go HIGH, if a valid sync is not received.
3. FLAG OUTPUTS are valid only when VALID WORD is LOW. Flags are MODE CODE, RT Enable, BROADCAST and VAL CMD WD.
4. BIT STATUS is valid only if wraparound transmit plus receive cycle has been performed. LATCH DATA must be HIGH, and either S/T SELECT or
RX STROBE must be HIGH for the full wraparound cycle duration.
FIGURE 3 – RECEIVE MODE TIMING
SCDCT1775 Rev B
6