DRF1200 Datasheet, PDF (3/8 Pages) Advanced Power Technology – MOSFET Driver Hybrid

DRF1200
Figure 2, Test Circuit
The Test Circuit illustrated above was used to evaluate the DRF1200 (available as an evaluation Board DRF1200
EVAL). The input control signal is applied to the DRF1200 via IN(4) and SG(5) pins using RG188. This provides excel-
lent noise immunity and control of the signal ground currents.
The FN pin is very sensitive and unwanted signals can cause erratic behavior, Therefore FN pin is heavily by-passed
on the Evaluation board, see FN (3) above.
The +VDD inputs (2,6) are By-Passed (C1-C3, C5-C7), this is in addition to the internal bypassing mentioned previ-
ously. The capacitors used for this function must be capable of supporting the RMS currents and frequency of the gate
load.
A 50Ω (R4) load is used evaluate the output performance of the DRF1200.