OP176 Datasheet, PDF (9/21 Pages) Analog Devices – Bipolar/JFET, Audio Operational Amplifier

OP176
Noise
The voltage noise density of the OP176 is below 6 nV/√Hz from
30 Hz. This enables low noise designs to have good perfor-
mance throughout the full audio range. Figure 27 shows a
typical OP176 with a 1/f corner at 6 Hz.
CH A: 80.0 µV FS
10.0 µV /DIV
MKR: 15.9 µV/ Hz
\ 0 Hz
MKR:
5.4 Hz
50Hz /
BW: 300 mHz
Figure 27. 1/f Noise Corner
Noise Testing
For audio applications the noise density is usually the most
important noise parameter. For characterization the OP176 is
tested using an Audio Precision, System One. The input signal
to the Audio Precision must be amplified enough to measure
accurately. For the OP176 the noise is gained by approximately
1020 using the circuit shown in Figure 28. Any readings on the
Audio Precision must then be divided by the gain. In imple-
menting this test fixture, good supply bypassing is essential.
OP176
100Ω
909Ω
100Ω
OP37
909Ω
490Ω
OP37
4.42kΩ
OUTPUT
Figure 28. Noise Test
Upgrading “5534‘’ Sockets
The OP176 is a superior amplifier for upgrading existing
designs using the industry standard 5534. In most application
circuits, the OP176 can directly replace the 5534 without any
modifications to the surrounding circuitry. Like the 5534, the
OP176 follows the industry standard, single op amp pinout. The
difference between these two devices is the location of the null
pins and the 5534’s compensation capacitor.
The 5534 normally requires a 22 pF capacitor between Pins 5
and 8 for stable operation. Since the OP176 is internally
compensated for unity gain operation, it does not require
external compensation. Nevertheless, if the 5534 socket already
includes a capacitor, the OP176 can be inserted without
removing it. Since the OP176’s Pin 8 is a “NO CONNECT’’
pin, there is no internal connection to that pin. Thus, the 22 pF
capacitor would be electrically connected through Pin 5 to the
internal nulling circuitry. With the other end left open, the
capacitor should have no effect on the circuit. However, to
avoid altogether any possibility for noise injection, it is recom-
mended that the 22 pF capacitor be cut out of the circuit
entirely.
If the original 5534 socket includes offset nulling circuitry, one
would find a 10 kΩ to 100 kΩ potentiometer connected between
Pins 1 and 8 with said potentiometer’s wiper arm connected to
V+. In order to upgrade the socket to the OP176, this circuit
should be removed before inserting the OP176 for its offset
nulling scheme uses Pins 1 and 5. Whereas the wiper arm of the
5534 trimming potentiometer is connected to the positive
supply, the OP176’s wiper arm is connected to the negative
supply. Directly substituting the OP176 into the original socket
would inject a large current imbalance into its input stage. In
this case, the potentiometer should be removed altogether, or, if
nulling is still required, the trimming potentiometer should be
rewired to match the nulling circuit as illustrated in Figure 29.
+V_S
2
7
6
OP176
3
5
P1
1
4
V_OUT
ΩP1 = 10kΩ
–VS
V_OS TRIM RANGE = ±2mV
Figure 29. Offset Voltage Nulling Scheme
Input Overcurrent Protection
The maximum input differential voltage that can be applied to
the OP176 is determined by a pair of internal Zener diodes
connected across its inputs. They limit the maximum differen-
tial input voltage to ± 7.5 V. This is to prevent emitter-base
junction breakdown from occurring in the input stage of the
OP176 when very large differential voltages are applied.
However, in order to preserve the OP176’s low input noise
voltage, internal resistances in series with the inputs were not
used to limit the current in the clamp diodes. In small signal
applications, this is not an issue; however, in applications where
large differential voltages can be inadvertently applied to the
device, large transient currents can flow through these diodes.
Although these diodes have been designed to carry a current of
± 5 mA, external resistors as shown in Figure 30 should be used
in the event that the OP176’s differential voltage were to exceed
± 7.5 V.
1.4kΩ
2
–
6
OP176
1.4kΩ ₃
+
Figure 30. Input Overcurrent Protection
REV. 0
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