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DAC888_15 Datasheet, PDF (9/12 Pages) Analog Devices – 8-BIt LevelTriggered Latch
~Mi)
DAG-888 BYTEDACQI)8-BIT HIGH-SPEED "MICROPROCESSOR COMPATIBLE" MULTIPLYING D/A CONVERTER
JASIC BIPOLAR OUTPUT OPERATION
- 'REF'
2.000mA
MY
~B
DB] DB6 DBS DB4 DBJ DB2 DBI DBO
,s.ooov
17
161 1-
WR
CONTROL& LATCHES
10
VREF'
lOUT
DAC
111
IVREF-
'OUT /
r
II
lS.000kH
114 EOUT
f S.OOOkH
In EOUT
OBSOLETE 12 IS 9
18
POSITIVE FULL-SCALE
POSITIVE FULL-SCALE -1 LSB
ZERO-SCALE + 1LSB
ZERO-SCALE
ZERO-SCALE -1 LSB
NEGATIVE FULL-SCALE +1 LSB
NEGATIVE FULL-SCALE
DB7 DB6 DBS DB4 DB3 DB2
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
DB1 DBO EO
1
1 -4.960
1
0 -4.920
EO
5.000
4.960
0
1 -0.040
0.080
0
0
0.000 0.040
1
1
0.040 0.000
0
1
4.900 -4.920
0
0
5.000 -4.960
OFFSET BINARY OPERATION
MY
~B
DB] DBG DBS DB4 DBJ DB2 DBI DBO
'S.OOOV
SkI!
SkH
.1SV
14
-lSV
EOUT
POSITIVE FULL-SCALE
POSITIVE FULL-SCALE -1LSB
ZERO-SCALE
NEGATIVE ZERO-SCALE + 1LSB
NEGATIVE FULL-SCALE
DB7 DB6 DBS DB4 DB3 DB2 DB1 DBO
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
EO
4.960
4.920
1
0
0
0
0
0
0
0
0.000
0
0
0
0
0
0
0
1
-4.960
0
0
0
0
0
0
0
0
-5.000
I
r..n
~
J:.r.1
~
>J:.r.1
Z
0u
C.J
0
J
~
Z
~
0
r--,<
J
~......
C.J
5
11-109
7/89, Rev. B