DAC888_15 Datasheet, PDF (1/12 Pages) Analog Devices – 8-BIt LevelTriggered Latch

[PMI)
precision Monolithics Inc.
DAC - 888
BYTEDACJo)X-BIT HIGH-SPEED "MICROPROCESSOR COMPATIBLE"
MULTI PLYING OJA CONVERTER
FEATURES
latches may also be operated in a transparent mode by
. 8-BIt LevelTriggered Latch
holding both control pins low.Additionally,the DAC-888 has
. 8-BIt J-LPCompatible
a data hold time requirement of zero nanoseconds.
. Easily Interfaced to All 8-BIt Processors
The Analogsection consists of a "Field-Proven"DAC-0801A
. TTL Logic Compatible
Converter. Monotonic multiplying performance is attained
. CE and WR Inputs
over a wide 20 to 1 reference current range. Matching to
. High Output Impedance and Compliance
within 1 LSB between reference and full-scale currents
. Proven DAC-O8Analog Flexibility and Reliability
eliminates full-scale adjustment in most applications.
. Nonlinearity to :!:O.1%Max
. Low Power Dissipation .....................
. Available In Die Form
134mW
ORDERINGINFORMATIONt
PACKAGE
NL
O_%F5
INDUSTRIAL
TEMPERATURE
B 0.1
DAC888EX
0.19
DAC888FX
S _{. For devices processed in total compliance to MIL-STD-883, add /883 after part}
O ^{number. Consult factory for 883 data sheet.}
t Burn-in is available on commercial and industrial temperature range parts in
L ^{CerDIP, plastic DIP, and TO-can packages. For ordering information, see}
1990/91 Data Book, Section 2.
E _{GENERAL DESCRIPTION}
TE _{The BYTEDAC@ DAC-888 is a buffered 8-bit digital-to-}
DAC-888 applications include graphic display drivers, high-
speed modems, AID converters, programmable waveform
generators and power supplies, analog meter drivers, audio
encoders and programmable attenuators; and other applica-
tions where low cost, high speed and buffered flexibility are
required.
PIN CONNECTIONS
18-PIN HERMETIC
DUAL-IN-LiNE
PACKAGE
(X-Suffix)
analog converter designed specifically for 8-bit bus oriented
systems. The data inputs are connected to level-triggered
latches. Two active-low control pins are provided for ease of
interface to virtually all available microprocessors. The
FUNCTIONAL DIAGRAM
17
CE
16
WR
CONTROL
LOGIC
DB] DB6 DBS DB4 DBJ DB2 DB1 DBO
MSB 0
0
00 0
00
0 LSB
a-BIT LATCH
10
VREF(+)
11
VREF(-I
12
COMP
a-BIT MULTIPL YING DAC
V-
GND
V+
ilanufactured under one or more of the following patents 4.055.773. 4,056,740. 4.092.639
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