AD1672_15 Datasheet, PDF (9/20 Pages) Analog Devices – Complete 12-Bit, 3 MSPS Monolithic A/D Converter

AD1672
APPLYING THE AD1672
ANALOG INPUTS
Figure 9 shows the equivalent analog input of the AD1672. The
input SHA and associated resistor network topology can be eas-
ily configured for either unipolar (0 V to 2.5 V, 0 V to 5.0 V) or
bipolar (–2.5 V to 2.5 V) input signals as shown in Figure 10.
The nominal input resistance, R_IN, of the AD1672 is 2 kΩ for a
2.5 V span and 4 kΩ for a 5 V span. The circuit topology both
level shifts and inverts the analog input for the various input
spans.
ANALOG
INPUT
C1
10µF
C2
1.0µF
10µF
1.0µF
21 AIN1
AD1672
22 AIN2
25 NCOMP2
20
REF
OUT
23 REFIN
ANALOG
INPUT
C1
10µF
C2
1.0µF
10µF
1.0µF
21 AIN1
AD1672
22 AIN2
25 NCOMP2
20
REF
OUT
23 REFIN
V_BIAS
1.25V
2.5V Span
5.0V Span
4kΩ
SHA_OUT
OBSOLETE ^AIN1
4kΩ
2kΩ
AIN 2
2kΩ
Figure 9. Equivalent Analog Input Circuit
V_IN
1µF
21 AIN1
22 AIN2
AD1672
20 REFOUT
23 REFIN
V_IN
1µF
21 AIN1
22 AIN2
AD1672
20 REFOUT
23 REFIN
a. 0 to +2.5 V Input Range b. 0 to +5.0 V Input Range
Figure 11. AC Coupled Inputs
In applications requiring dc coupling, a buffer amplifier is rec-
ommended for driving the AD1672 input. Any source resis-
tance will contribute to both gain and offset error due to its
interaction with the AD1672’s input resistance. The particular
application and signal input range will determine how the buffer
amplifier is configured. For example, in dc precision applica-
tions, the buffer amplifier can be configured for convenient gain
and offset adjustment as shown in Figure 12. In spectral
analysis/signal processing applications, the buffer amplifier can
be configured as a 2nd order antialiasing filter in a Sallen-Key
or Multiple-Feedback topology as shown in Figure 13.
ANALOG
INPUT
GAIN
ADJUSTMENT
500Ω 50Ω 500Ω
V_CC
V_IN
21 AIN1
AD1672
5kΩ
AIN
22 AIN2
AD1672
OFFSET
ADJUSTMENTS
50Ω
20 REFOUT
0.1µF
5kΩ
23 REFIN
1µF
V_EE
c. –2.5 to +2.5 V Input Range
Figure 10. Input Range Connections
In applications where ac coupling of the analog input signal is
appropriate such as in a single supply system, the user can
capacitively couple the input signal for a 2.5 V or 5 V span thus
removing any preceding system dc offsets. Figure 11 shows the
proper configurations of the AD1672 for ac coupling. Main-
taining the specifications outlined in the data sheet requires care-
ful selection of the component values. The most important
concern is that the f _{–3 dB} high pass corner is a function of C1 and
C2 in parallel with R_IN. The f _{-3 dB} point can be approximated
by the equation
f/ _{–3 dB} = 1 / (2 × π × R_IN × C_EQ )
where C_EQ is the parallel combination of C1 and C2. Note that
C1 is typically a large electrolytic or tantalum capacitor that be-
comes inductive at high frequencies. Adding a small ceramic
capacitor on the order of 0.1 µF that does not become inductive
until negligibly higher frequencies maintains a low impedance
over a wide frequency range.
Figure 12. Offset and Gain Adjustment
V_{IN R1}
R3
C2
R2
C1
R4
V_{IN R1 R2}
V_OUT
C1
C2
V_OUT
R3
Figure 13. Sallen-Key and Multiple-Feedback
Antialiasing Filter Topologies
In imaging and multiplexed data acquisition applications, the
AD1672’s wide input bandwidth facilitates rapid acquisition of
transient input signals: the input SHA can typically settle to 12-
bit accuracy from a full scale input step in less than 150 ns. Fig-
ure 14 illustrates the typical acquisition of a full scale input step.
For amplifiers that are powered by supplies greater than
6.5 V, it is recommended that a clamping circuit be included at
the input of AD1672. This circuit limits the input voltage to
6.5 V under a fault condition.
REV. 0
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