AD9920ABBCZ Datasheet, PDF (82/112 Pages) Analog Devices – 12-Bit CCD Signal Processor with V-Driver and Precision Timing Generator

AD9920A
1
POWER 0V
SUPPLIES
4
VH SUPPLY
VM SUPPLY
VL SUPPLY
+3V SUPPLIES
+1.8V SUPPLY
CLI
(INPUT)
SERIAL
WRITES
SYNC/RST
2
3
VD
(INPUT)
5
6
7
500µs
8
9
100µs
10 11
12
HD
(INPUT)
XV1 TO XV24
XSUBCK
(INTERNAL)
H-CLOCKS
VDR_EN
V1 TO V16
(V-DRIVER OUTPUT)
LOW BY
DEFAULT
HIGH-Z BY
DEFAULT
0V
H2, H4, H6, H8
H1, H3, H5, H7, RG
CLOCKS ACTIVE WHEN OUT_CONTROL
REGISTER UPDATED AT VD/HD EDGE
VDD
V-DRIVER OUTPUTS ACTIVE
VH WHEN VDR_EN IS HIGH
VM
VL (SUBCK ONLY)
Figure 103. Recommended Power-Up Sequence and Synchronization, Slave Mode
Rev. B | Page 82 of 112